diff mbox series

[8/8] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs

Message ID 20230911050549.763538-9-mitulkumar.ajitkumar.golani@intel.com (mailing list archive)
State New, archived
Headers show
Series Add DSC fractional bpp support | expand

Commit Message

Mitul Golani Sept. 11, 2023, 5:05 a.m. UTC
From: Swati Sharma <swati2.sharma@intel.com>

If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.

v2:
-Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
-Fix comment (Suraj)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Suraj Kandpal Sept. 11, 2023, 9:45 a.m. UTC | #1
> Subject: [PATCH 8/8] drm/i915/dsc: Allow DSC only with fractional bpp when
> forced from debugfs
> 
> From: Swati Sharma <swati2.sharma@intel.com>
> 
> If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
> compressed bpp is fractional. Continue if the computed compressed bpp turns
> out to be a integer.
> 
> v2:
> -Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) -Fix comment
> (Suraj)
> 

LGTM.
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 90c92f3dc62a..f6bfbd89bc3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1904,6 +1904,9 @@ xelpd_dsc_compute_link_config(struct intel_dp
> *intel_dp,
>  	for (compressed_bppx16 = dsc_max_bpp;
>  	     compressed_bppx16 >= dsc_min_bpp;
>  	     compressed_bppx16 -= bppx16_step) {
> +		if (intel_dp->force_dsc_fractional_bpp_en &&
> +		    !to_bpp_frac_dec(compressed_bppx16))
> +			continue;
>  		ret = dsc_compute_link_config(intel_dp,
>  					      pipe_config,
>  					      limits,
> @@ -1911,6 +1914,10 @@ xelpd_dsc_compute_link_config(struct intel_dp
> *intel_dp,
>  					      timeslots);
>  		if (ret == 0) {
>  			pipe_config->dsc.compressed_bpp_x16 =
> compressed_bppx16;
> +			if (intel_dp->force_dsc_fractional_bpp_en &&
> +			    to_bpp_frac_dec(compressed_bppx16))
> +				drm_dbg_kms(&i915->drm, "Forcing DSC
> fractional bpp\n");
> +
>  			return 0;
>  		}
>  	}
> --
> 2.25.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 90c92f3dc62a..f6bfbd89bc3f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1904,6 +1904,9 @@  xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
 	for (compressed_bppx16 = dsc_max_bpp;
 	     compressed_bppx16 >= dsc_min_bpp;
 	     compressed_bppx16 -= bppx16_step) {
+		if (intel_dp->force_dsc_fractional_bpp_en &&
+		    !to_bpp_frac_dec(compressed_bppx16))
+			continue;
 		ret = dsc_compute_link_config(intel_dp,
 					      pipe_config,
 					      limits,
@@ -1911,6 +1914,10 @@  xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
 					      timeslots);
 		if (ret == 0) {
 			pipe_config->dsc.compressed_bpp_x16 = compressed_bppx16;
+			if (intel_dp->force_dsc_fractional_bpp_en &&
+			    to_bpp_frac_dec(compressed_bppx16))
+				drm_dbg_kms(&i915->drm, "Forcing DSC fractional bpp\n");
+
 			return 0;
 		}
 	}