| Message ID | 20230913130935.27707-9-nirmoy.das@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Update GGTT with MI_UPDATE_GTT on MTL | expand |
Reviewed-by: Oak Zeng <oak.zeng@intel.com> Thanks, Oak > -----Original Message----- > From: Das, Nirmoy <nirmoy.das@intel.com> > Sent: Wednesday, September 13, 2023 9:10 AM > To: intel-gfx@lists.freedesktop.org > Cc: Zeng, Oak <oak.zeng@intel.com>; chris.p.wilson@linux.intel.com; Piorkowski, > Piotr <piotr.piorkowski@intel.com>; Shyti, Andi <andi.shyti@intel.com>; Mun, > Gwan-gyeong <gwan-gyeong.mun@intel.com>; Roper, Matthew D > <matthew.d.roper@intel.com>; Das, Nirmoy <nirmoy.das@intel.com> > Subject: [PATCH 7/7] drm/i915: Enable GGTT updates with binder in MTL > > MTL can hang because of a HW bug while parallel reading/writing > from/to LMEM/GTTMMADR BAR so try to reduce GGTT update > related pci transactions with blitter command as recommended > for Wa_13010847436 and Wa_14019519902. > > Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c > b/drivers/gpu/drm/i915/gt/intel_gtt.c > index 4c89eb8d9af7..4fbed27ef0ec 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c > @@ -23,7 +23,8 @@ > > bool i915_ggtt_require_binder(struct drm_i915_private *i915) > { > - return false; > + /* Wa_13010847436 & Wa_14019519902 */ > + return MEDIA_VER_FULL(i915) == IP_VER(13, 0); > } > > static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915) > -- > 2.41.0
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c index 4c89eb8d9af7..4fbed27ef0ec 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.c +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c @@ -23,7 +23,8 @@ bool i915_ggtt_require_binder(struct drm_i915_private *i915) { - return false; + /* Wa_13010847436 & Wa_14019519902 */ + return MEDIA_VER_FULL(i915) == IP_VER(13, 0); } static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915)
MTL can hang because of a HW bug while parallel reading/writing from/to LMEM/GTTMMADR BAR so try to reduce GGTT update related pci transactions with blitter command as recommended for Wa_13010847436 and Wa_14019519902. Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> --- drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)