| Message ID | 20230915083412.4572-7-nirmoy.das@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Update GGTT with MI_UPDATE_GTT on MTL | expand |
On Fri, 15 Sep 2023, Nirmoy Das <nirmoy.das@intel.com> wrote: > Toggle binder context ready status when needed. > > To issue gpu commands, the driver must be primed to receive > requests. Maintain binder-based GGTT update disablement until driver > probing completes. Moreover, implement a temporary disablement > of blitter prior to entering suspend, followed by re-enablement > post-resume. This is acceptable as those transition periods are > mostly single threaded. > > Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> > Signed-off-by: Oak Zeng <oak.zeng@intel.com> Not a fan of adding more gt (or gem, or display) specific details at the top level driver hooks. The direction should be to remove stuff from there, and move to lower levels. The top level functions have become really hard to understand because we don't know the ordering constraints. This adds more constraints, and looks like very specific and complicated ones too. BR, Jani. > --- > drivers/gpu/drm/i915/i915_driver.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > index f8dbee7a5af7..8cc289acdb39 100644 > --- a/drivers/gpu/drm/i915/i915_driver.c > +++ b/drivers/gpu/drm/i915/i915_driver.c > @@ -815,6 +815,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) > i915_welcome_messages(i915); > > i915->do_release = true; > + intel_gt_bind_context_set_ready(to_gt(i915), true); > > return 0; > > @@ -855,6 +856,7 @@ void i915_driver_remove(struct drm_i915_private *i915) > { > intel_wakeref_t wakeref; > > + intel_gt_bind_context_set_ready(to_gt(i915), false); > wakeref = intel_runtime_pm_get(&i915->runtime_pm); > > i915_driver_unregister(i915); > @@ -1077,6 +1079,8 @@ static int i915_drm_suspend(struct drm_device *dev) > struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); > pci_power_t opregion_target_state; > > + intel_gt_bind_context_set_ready(to_gt(dev_priv), false); > + > disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); > > /* We do a lot of poking in a lot of registers, make sure they work > @@ -1264,6 +1268,7 @@ static int i915_drm_resume(struct drm_device *dev) > intel_gvt_resume(dev_priv); > > enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); > + intel_gt_bind_context_set_ready(to_gt(dev_priv), true); > > return 0; > }
On 9/15/2023 11:50 AM, Jani Nikula wrote: > On Fri, 15 Sep 2023, Nirmoy Das <nirmoy.das@intel.com> wrote: >> Toggle binder context ready status when needed. >> >> To issue gpu commands, the driver must be primed to receive >> requests. Maintain binder-based GGTT update disablement until driver >> probing completes. Moreover, implement a temporary disablement >> of blitter prior to entering suspend, followed by re-enablement >> post-resume. This is acceptable as those transition periods are >> mostly single threaded. >> >> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> >> Signed-off-by: Oak Zeng <oak.zeng@intel.com> > Not a fan of adding more gt (or gem, or display) specific details at the > top level driver hooks. The direction should be to remove stuff from > there, and move to lower levels. > > The top level functions have become really hard to understand because we > don't know the ordering constraints. This adds more constraints, and > looks like very specific and complicated ones too. Tried to hook this into gt suspend/resume but didn't work well . I will try again. Thanks, Nirmoy > > BR, > Jani. > > >> --- >> drivers/gpu/drm/i915/i915_driver.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c >> index f8dbee7a5af7..8cc289acdb39 100644 >> --- a/drivers/gpu/drm/i915/i915_driver.c >> +++ b/drivers/gpu/drm/i915/i915_driver.c >> @@ -815,6 +815,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) >> i915_welcome_messages(i915); >> >> i915->do_release = true; >> + intel_gt_bind_context_set_ready(to_gt(i915), true); >> >> return 0; >> >> @@ -855,6 +856,7 @@ void i915_driver_remove(struct drm_i915_private *i915) >> { >> intel_wakeref_t wakeref; >> >> + intel_gt_bind_context_set_ready(to_gt(i915), false); >> wakeref = intel_runtime_pm_get(&i915->runtime_pm); >> >> i915_driver_unregister(i915); >> @@ -1077,6 +1079,8 @@ static int i915_drm_suspend(struct drm_device *dev) >> struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); >> pci_power_t opregion_target_state; >> >> + intel_gt_bind_context_set_ready(to_gt(dev_priv), false); >> + >> disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); >> >> /* We do a lot of poking in a lot of registers, make sure they work >> @@ -1264,6 +1268,7 @@ static int i915_drm_resume(struct drm_device *dev) >> intel_gvt_resume(dev_priv); >> >> enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); >> + intel_gt_bind_context_set_ready(to_gt(dev_priv), true); >> >> return 0; >> }
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index f8dbee7a5af7..8cc289acdb39 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -815,6 +815,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) i915_welcome_messages(i915); i915->do_release = true; + intel_gt_bind_context_set_ready(to_gt(i915), true); return 0; @@ -855,6 +856,7 @@ void i915_driver_remove(struct drm_i915_private *i915) { intel_wakeref_t wakeref; + intel_gt_bind_context_set_ready(to_gt(i915), false); wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915_driver_unregister(i915); @@ -1077,6 +1079,8 @@ static int i915_drm_suspend(struct drm_device *dev) struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); pci_power_t opregion_target_state; + intel_gt_bind_context_set_ready(to_gt(dev_priv), false); + disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); /* We do a lot of poking in a lot of registers, make sure they work @@ -1264,6 +1268,7 @@ static int i915_drm_resume(struct drm_device *dev) intel_gvt_resume(dev_priv); enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); + intel_gt_bind_context_set_ready(to_gt(dev_priv), true); return 0; }