| Message ID | 20230926020053.245046-1-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Add missing CCS documentation. | expand |
On 26/09/2023 03:00, Rodrigo Vivi wrote: > Let's introduce the basic documentation about CCS. > While doing that, also removed the legacy execution flag name. That flag > simply doesn't exist for CCS and it is not needed on current context > submission. Those flag names are only needed on legacy context, > while on new ones we only need to pass the engine ID. > > It is worth mention that this documentation should probably live with > the engine definitions rather than in the i915.rst file directly and > that more updates are likely need in this section. But this should > come later. > > v2: Overall improvements from Matt and Tvrtko. > > Fixes: 944823c94639 ("drm/i915/xehp: Define compute class and engine") > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > Documentation/gpu/i915.rst | 25 ++++++++++++------------- > 1 file changed, 12 insertions(+), 13 deletions(-) > > diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst > index 378e825754d5..13de8bcaaa29 100644 > --- a/Documentation/gpu/i915.rst > +++ b/Documentation/gpu/i915.rst > @@ -267,19 +267,18 @@ i915 driver. > Intel GPU Basics > ---------------- > > -An Intel GPU has multiple engines. There are several engine types. > - > -- RCS engine is for rendering 3D and performing compute, this is named > - `I915_EXEC_RENDER` in user space. > -- BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user > - space. > -- VCS is a video encode and decode engine, this is named `I915_EXEC_BSD` > - in user space > -- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user > - space. > -- The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine; > - instead it is to be used by user space to specify a default rendering > - engine (for 3D) that may or may not be the same as RCS. > +An Intel GPU has multiple engines. There are several engine types: > + > +- Render Command Streamer (RCS). An engine for rendering 3D and > + performing compute. > +- Blitting Command Streamer (BCS). An engine for performing blitting and/or > + copying operations. > +- Video Command Streamer. An engine used for video encoding and decoding. Also > + sometimes called 'BSD' in hardware documentation. > +- Video Enhancement Command Streamer (VECS). An engine for video enhancement. > + Also sometimes called 'VEBOX' in hardware documentation. > +- Compute Command Streamer (CCS). An engine that has access to the media and > + GPGPU pipelines, but not the 3D pipeline. > > The Intel GPU family is a family of integrated GPU's using Unified > Memory Access. For having the GPU "do work", user space will feed the LGTM. Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
On Tue, Sep 26, 2023 at 09:36:53AM +0100, Tvrtko Ursulin wrote: > > On 26/09/2023 03:00, Rodrigo Vivi wrote: > > Let's introduce the basic documentation about CCS. > > While doing that, also removed the legacy execution flag name. That flag > > simply doesn't exist for CCS and it is not needed on current context > > submission. Those flag names are only needed on legacy context, > > while on new ones we only need to pass the engine ID. > > > > It is worth mention that this documentation should probably live with > > the engine definitions rather than in the i915.rst file directly and > > that more updates are likely need in this section. But this should > > come later. > > > > v2: Overall improvements from Matt and Tvrtko. > > > > Fixes: 944823c94639 ("drm/i915/xehp: Define compute class and engine") > > Cc: Matt Roper <matthew.d.roper@intel.com> > > Cc: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > --- > > Documentation/gpu/i915.rst | 25 ++++++++++++------------- > > 1 file changed, 12 insertions(+), 13 deletions(-) > > > > diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst > > index 378e825754d5..13de8bcaaa29 100644 > > --- a/Documentation/gpu/i915.rst > > +++ b/Documentation/gpu/i915.rst > > @@ -267,19 +267,18 @@ i915 driver. > > Intel GPU Basics > > ---------------- > > -An Intel GPU has multiple engines. There are several engine types. > > - > > -- RCS engine is for rendering 3D and performing compute, this is named > > - `I915_EXEC_RENDER` in user space. > > -- BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user > > - space. > > -- VCS is a video encode and decode engine, this is named `I915_EXEC_BSD` > > - in user space > > -- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user > > - space. > > -- The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine; > > - instead it is to be used by user space to specify a default rendering > > - engine (for 3D) that may or may not be the same as RCS. > > +An Intel GPU has multiple engines. There are several engine types: > > + > > +- Render Command Streamer (RCS). An engine for rendering 3D and > > + performing compute. > > +- Blitting Command Streamer (BCS). An engine for performing blitting and/or > > + copying operations. > > +- Video Command Streamer. An engine used for video encoding and decoding. Also > > + sometimes called 'BSD' in hardware documentation. > > +- Video Enhancement Command Streamer (VECS). An engine for video enhancement. > > + Also sometimes called 'VEBOX' in hardware documentation. > > +- Compute Command Streamer (CCS). An engine that has access to the media and > > + GPGPU pipelines, but not the 3D pipeline. > > The Intel GPU family is a family of integrated GPU's using Unified > > Memory Access. For having the GPU "do work", user space will feed the If this is in the "GPU Basics" section and is focused on explaining the hardware rather than the driver/uapi, then shouldn't we add the GSCCS as well? Matt > > LGTM. > > Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Regards, > > Tvrtko
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 378e825754d5..13de8bcaaa29 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -267,19 +267,18 @@ i915 driver. Intel GPU Basics ---------------- -An Intel GPU has multiple engines. There are several engine types. - -- RCS engine is for rendering 3D and performing compute, this is named - `I915_EXEC_RENDER` in user space. -- BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user - space. -- VCS is a video encode and decode engine, this is named `I915_EXEC_BSD` - in user space -- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user - space. -- The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine; - instead it is to be used by user space to specify a default rendering - engine (for 3D) that may or may not be the same as RCS. +An Intel GPU has multiple engines. There are several engine types: + +- Render Command Streamer (RCS). An engine for rendering 3D and + performing compute. +- Blitting Command Streamer (BCS). An engine for performing blitting and/or + copying operations. +- Video Command Streamer. An engine used for video encoding and decoding. Also + sometimes called 'BSD' in hardware documentation. +- Video Enhancement Command Streamer (VECS). An engine for video enhancement. + Also sometimes called 'VEBOX' in hardware documentation. +- Compute Command Streamer (CCS). An engine that has access to the media and + GPGPU pipelines, but not the 3D pipeline. The Intel GPU family is a family of integrated GPU's using Unified Memory Access. For having the GPU "do work", user space will feed the
Let's introduce the basic documentation about CCS. While doing that, also removed the legacy execution flag name. That flag simply doesn't exist for CCS and it is not needed on current context submission. Those flag names are only needed on legacy context, while on new ones we only need to pass the engine ID. It is worth mention that this documentation should probably live with the engine definitions rather than in the i915.rst file directly and that more updates are likely need in this section. But this should come later. v2: Overall improvements from Matt and Tvrtko. Fixes: 944823c94639 ("drm/i915/xehp: Define compute class and engine") Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- Documentation/gpu/i915.rst | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-)