Message ID | 20230926175554.25968-1-rodrigo.vivi@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Add missing GSCCS documentation | expand |
On Tue, Sep 26, 2023 at 01:55:54PM -0400, Rodrigo Vivi wrote: > Introduce the basic documentation about GSC CS. > > This "GPU Basics" section is focused on explaining the hardware > rather than the driver/uapi, so let's make sure GSC is also > properly documented here. > > v2: Fixes from Matt: typos and acronym. > > Fixes: 5fd974d164b4 ("drm/i915/mtl: add initial definitions for GSC CS") > Suggested-by: Matt Roper <matthew.d.roper@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > Documentation/gpu/i915.rst | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst > index 13de8bcaaa29..0ca1550fd9dc 100644 > --- a/Documentation/gpu/i915.rst > +++ b/Documentation/gpu/i915.rst > @@ -279,6 +279,10 @@ An Intel GPU has multiple engines. There are several engine types: > Also sometimes called 'VEBOX' in hardware documentation. > - Compute Command Streamer (CCS). An engine that has access to the media and > GPGPU pipelines, but not the 3D pipeline. > +- Graphics Security Controller (GSCCS). A dedicated engine for internal > + communication with GSC controller on security related tasks like > + High-bandwidth Digital Content Protection (HDCP), Protected Xe Path (PXP), > + and HuC firmware authentication. > > The Intel GPU family is a family of integrated GPU's using Unified > Memory Access. For having the GPU "do work", user space will feed the > -- > 2.41.0 >
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 13de8bcaaa29..0ca1550fd9dc 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -279,6 +279,10 @@ An Intel GPU has multiple engines. There are several engine types: Also sometimes called 'VEBOX' in hardware documentation. - Compute Command Streamer (CCS). An engine that has access to the media and GPGPU pipelines, but not the 3D pipeline. +- Graphics Security Controller (GSCCS). A dedicated engine for internal + communication with GSC controller on security related tasks like + High-bandwidth Digital Content Protection (HDCP), Protected Xe Path (PXP), + and HuC firmware authentication. The Intel GPU family is a family of integrated GPU's using Unified Memory Access. For having the GPU "do work", user space will feed the
Introduce the basic documentation about GSC CS. This "GPU Basics" section is focused on explaining the hardware rather than the driver/uapi, so let's make sure GSC is also properly documented here. v2: Fixes from Matt: typos and acronym. Fixes: 5fd974d164b4 ("drm/i915/mtl: add initial definitions for GSC CS") Suggested-by: Matt Roper <matthew.d.roper@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- Documentation/gpu/i915.rst | 4 ++++ 1 file changed, 4 insertions(+)