| Message ID | 20230929074306.1533859-1-uma.shankar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4] drm/i915/display: Created exclusive version of vga decode setup | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Uma > Shankar > Sent: Friday, September 29, 2023 1:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: [Intel-gfx] [v4] drm/i915/display: Created exclusive version of vga > decode setup > > Current vga arbiter implementation in i915 needs a re-design. > The current approach would cause real problems if anyone actually needs to > talk another GPU using legacy VGA resources. > > The main issue is that X becomes a slideshow if it thinks there are multiple > GPUs that have VGA decoding enabled as it insists on adjusting the VGA routing > pretty much for every little operation involving any of the GPUs. > > The cleanup will be planned for i915. Meanwhile to focus on Xe upstreaming > and have a cleaner separation, the said functionality is being moved to a > different file exclusive for i915. Xe driver will re-use rest of the display code > from i915. > > v2: Addressed Jani Nikula's review comments. > > v3: Dropped a duplicate function (Jani) > > v4: Updated commit message with reasoning as sugested by Ville. > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks and Regards, Arun R Murthy -------------------- > --- > drivers/gpu/drm/i915/display/intel_vga.c | 18 +----------------- > drivers/gpu/drm/i915/soc/intel_gmch.c | 14 ++++++++++++++ > drivers/gpu/drm/i915/soc/intel_gmch.h | 2 ++ > 3 files changed, 17 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c > b/drivers/gpu/drm/i915/display/intel_vga.c > index 286a0bdd28c6..4b98833bfa8c 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -3,11 +3,9 @@ > * Copyright © 2019 Intel Corporation > */ > > -#include <linux/pci.h> > #include <linux/vgaarb.h> > > #include <video/vga.h> > - > #include "soc/intel_gmch.h" > > #include "i915_drv.h" > @@ -99,20 +97,6 @@ void intel_vga_reset_io_mem(struct drm_i915_private > *i915) > vga_put(pdev, VGA_RSRC_LEGACY_IO); > } > > -static unsigned int > -intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) -{ > - struct drm_i915_private *i915 = pdev_to_i915(pdev); > - > - intel_gmch_vga_set_state(i915, enable_decode); > - > - if (enable_decode) > - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | > - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > - else > - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > -} > - > int intel_vga_register(struct drm_i915_private *i915) { > > @@ -127,7 +111,7 @@ int intel_vga_register(struct drm_i915_private *i915) > * then we do not take part in VGA arbitration and the > * vga_client_register() fails with -ENODEV. > */ > - ret = vga_client_register(pdev, intel_vga_set_decode); > + ret = vga_client_register(pdev, intel_gmch_vga_set_decode); > if (ret && ret != -ENODEV) > return ret; > > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c > b/drivers/gpu/drm/i915/soc/intel_gmch.c > index 49c7fb16e934..f32e9f78770a 100644 > --- a/drivers/gpu/drm/i915/soc/intel_gmch.c > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.c > @@ -5,6 +5,7 @@ > > #include <linux/pci.h> > #include <linux/pnp.h> > +#include <linux/vgaarb.h> > > #include <drm/drm_managed.h> > #include <drm/i915_drm.h> > @@ -167,3 +168,16 @@ int intel_gmch_vga_set_state(struct > drm_i915_private *i915, bool enable_decode) > > return 0; > } > + > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool > +enable_decode) { > + struct drm_i915_private *i915 = pdev_to_i915(pdev); > + > + intel_gmch_vga_set_state(i915, enable_decode); > + > + if (enable_decode) > + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | > + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > + else > + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; } > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h > b/drivers/gpu/drm/i915/soc/intel_gmch.h > index d0133eedc720..23be2d113afd 100644 > --- a/drivers/gpu/drm/i915/soc/intel_gmch.h > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.h > @@ -8,11 +8,13 @@ > > #include <linux/types.h> > > +struct pci_dev; > struct drm_i915_private; > > int intel_gmch_bridge_setup(struct drm_i915_private *i915); void > intel_gmch_bar_setup(struct drm_i915_private *i915); void > intel_gmch_bar_teardown(struct drm_i915_private *i915); int > intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode); > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool > +enable_decode); > > #endif /* __INTEL_GMCH_H__ */ > -- > 2.42.0
> -----Original Message----- > From: Murthy, Arun R <arun.r.murthy@intel.com> > Sent: Wednesday, October 4, 2023 12:13 PM > To: Shankar, Uma <uma.shankar@intel.com>; intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com> > Subject: RE: [Intel-gfx] [v4] drm/i915/display: Created exclusive version of vga > decode setup > > > > -----Original Message----- > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of > > Uma Shankar > > Sent: Friday, September 29, 2023 1:13 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: Nikula, Jani <jani.nikula@intel.com> > > Subject: [Intel-gfx] [v4] drm/i915/display: Created exclusive version > > of vga decode setup > > > > Current vga arbiter implementation in i915 needs a re-design. > > The current approach would cause real problems if anyone actually > > needs to talk another GPU using legacy VGA resources. > > > > The main issue is that X becomes a slideshow if it thinks there are > > multiple GPUs that have VGA decoding enabled as it insists on > > adjusting the VGA routing pretty much for every little operation involving any of > the GPUs. > > > > The cleanup will be planned for i915. Meanwhile to focus on Xe > > upstreaming and have a cleaner separation, the said functionality is > > being moved to a different file exclusive for i915. Xe driver will > > re-use rest of the display code from i915. > > > > v2: Addressed Jani Nikula's review comments. > > > > v3: Dropped a duplicate function (Jani) > > > > v4: Updated commit message with reasoning as sugested by Ville. > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> > > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks Arun, Ville and Jani for the reviews. Pushed the change to drm-intel-next. Will create a follow-up internal task for vga cleanup and handling as suggested by Ville. Regards, Uma Shankar > Thanks and Regards, > Arun R Murthy > -------------------- > > --- > > drivers/gpu/drm/i915/display/intel_vga.c | 18 +----------------- > > drivers/gpu/drm/i915/soc/intel_gmch.c | 14 ++++++++++++++ > > drivers/gpu/drm/i915/soc/intel_gmch.h | 2 ++ > > 3 files changed, 17 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c > > b/drivers/gpu/drm/i915/display/intel_vga.c > > index 286a0bdd28c6..4b98833bfa8c 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vga.c > > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > > @@ -3,11 +3,9 @@ > > * Copyright © 2019 Intel Corporation > > */ > > > > -#include <linux/pci.h> > > #include <linux/vgaarb.h> > > > > #include <video/vga.h> > > - > > #include "soc/intel_gmch.h" > > > > #include "i915_drv.h" > > @@ -99,20 +97,6 @@ void intel_vga_reset_io_mem(struct drm_i915_private > > *i915) > > vga_put(pdev, VGA_RSRC_LEGACY_IO); > > } > > > > -static unsigned int > > -intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) -{ > > - struct drm_i915_private *i915 = pdev_to_i915(pdev); > > - > > - intel_gmch_vga_set_state(i915, enable_decode); > > - > > - if (enable_decode) > > - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | > > - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > > - else > > - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > > -} > > - > > int intel_vga_register(struct drm_i915_private *i915) { > > > > @@ -127,7 +111,7 @@ int intel_vga_register(struct drm_i915_private *i915) > > * then we do not take part in VGA arbitration and the > > * vga_client_register() fails with -ENODEV. > > */ > > - ret = vga_client_register(pdev, intel_vga_set_decode); > > + ret = vga_client_register(pdev, intel_gmch_vga_set_decode); > > if (ret && ret != -ENODEV) > > return ret; > > > > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c > > b/drivers/gpu/drm/i915/soc/intel_gmch.c > > index 49c7fb16e934..f32e9f78770a 100644 > > --- a/drivers/gpu/drm/i915/soc/intel_gmch.c > > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.c > > @@ -5,6 +5,7 @@ > > > > #include <linux/pci.h> > > #include <linux/pnp.h> > > +#include <linux/vgaarb.h> > > > > #include <drm/drm_managed.h> > > #include <drm/i915_drm.h> > > @@ -167,3 +168,16 @@ int intel_gmch_vga_set_state(struct > > drm_i915_private *i915, bool enable_decode) > > > > return 0; > > } > > + > > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool > > +enable_decode) { > > + struct drm_i915_private *i915 = pdev_to_i915(pdev); > > + > > + intel_gmch_vga_set_state(i915, enable_decode); > > + > > + if (enable_decode) > > + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | > > + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > > + else > > + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; } > > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h > > b/drivers/gpu/drm/i915/soc/intel_gmch.h > > index d0133eedc720..23be2d113afd 100644 > > --- a/drivers/gpu/drm/i915/soc/intel_gmch.h > > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.h > > @@ -8,11 +8,13 @@ > > > > #include <linux/types.h> > > > > +struct pci_dev; > > struct drm_i915_private; > > > > int intel_gmch_bridge_setup(struct drm_i915_private *i915); void > > intel_gmch_bar_setup(struct drm_i915_private *i915); void > > intel_gmch_bar_teardown(struct drm_i915_private *i915); int > > intel_gmch_vga_set_state(struct drm_i915_private *i915, bool > > enable_decode); > > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool > > +enable_decode); > > > > #endif /* __INTEL_GMCH_H__ */ > > -- > > 2.42.0
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 286a0bdd28c6..4b98833bfa8c 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -3,11 +3,9 @@ * Copyright © 2019 Intel Corporation */ -#include <linux/pci.h> #include <linux/vgaarb.h> #include <video/vga.h> - #include "soc/intel_gmch.h" #include "i915_drv.h" @@ -99,20 +97,6 @@ void intel_vga_reset_io_mem(struct drm_i915_private *i915) vga_put(pdev, VGA_RSRC_LEGACY_IO); } -static unsigned int -intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) -{ - struct drm_i915_private *i915 = pdev_to_i915(pdev); - - intel_gmch_vga_set_state(i915, enable_decode); - - if (enable_decode) - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; - else - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; -} - int intel_vga_register(struct drm_i915_private *i915) { @@ -127,7 +111,7 @@ int intel_vga_register(struct drm_i915_private *i915) * then we do not take part in VGA arbitration and the * vga_client_register() fails with -ENODEV. */ - ret = vga_client_register(pdev, intel_vga_set_decode); + ret = vga_client_register(pdev, intel_gmch_vga_set_decode); if (ret && ret != -ENODEV) return ret; diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c index 49c7fb16e934..f32e9f78770a 100644 --- a/drivers/gpu/drm/i915/soc/intel_gmch.c +++ b/drivers/gpu/drm/i915/soc/intel_gmch.c @@ -5,6 +5,7 @@ #include <linux/pci.h> #include <linux/pnp.h> +#include <linux/vgaarb.h> #include <drm/drm_managed.h> #include <drm/i915_drm.h> @@ -167,3 +168,16 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode) return 0; } + +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode) +{ + struct drm_i915_private *i915 = pdev_to_i915(pdev); + + intel_gmch_vga_set_state(i915, enable_decode); + + if (enable_decode) + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; + else + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; +} diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h index d0133eedc720..23be2d113afd 100644 --- a/drivers/gpu/drm/i915/soc/intel_gmch.h +++ b/drivers/gpu/drm/i915/soc/intel_gmch.h @@ -8,11 +8,13 @@ #include <linux/types.h> +struct pci_dev; struct drm_i915_private; int intel_gmch_bridge_setup(struct drm_i915_private *i915); void intel_gmch_bar_setup(struct drm_i915_private *i915); void intel_gmch_bar_teardown(struct drm_i915_private *i915); int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode); +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode); #endif /* __INTEL_GMCH_H__ */
Current vga arbiter implementation in i915 needs a re-design. The current approach would cause real problems if anyone actually needs to talk another GPU using legacy VGA resources. The main issue is that X becomes a slideshow if it thinks there are multiple GPUs that have VGA decoding enabled as it insists on adjusting the VGA routing pretty much for every little operation involving any of the GPUs. The cleanup will be planned for i915. Meanwhile to focus on Xe upstreaming and have a cleaner separation, the said functionality is being moved to a different file exclusive for i915. Xe driver will re-use rest of the display code from i915. v2: Addressed Jani Nikula's review comments. v3: Dropped a duplicate function (Jani) v4: Updated commit message with reasoning as sugested by Ville. Signed-off-by: Uma Shankar <uma.shankar@intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 18 +----------------- drivers/gpu/drm/i915/soc/intel_gmch.c | 14 ++++++++++++++ drivers/gpu/drm/i915/soc/intel_gmch.h | 2 ++ 3 files changed, 17 insertions(+), 17 deletions(-)