Message ID | 20231002172419.1017044-4-jonathan.cavitt@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v3,1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines | expand |
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c index 7e41f69fc818f..46e0a1dbecc8d 100644 --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c @@ -137,7 +137,7 @@ pte_tlbinv(struct intel_context *ce, i915_request_add(rq); /* Short sleep to sanitycheck the batch is spinning before we begin */ - msleep(10); + msleep(200); if (va == vb) { if (!i915_request_completed(rq)) { pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
For the gt_tlb live selftest, increase the timeout from 10 ms to 200 ms. 200 ms should be more than enough time, and 10 ms was too aggressive. Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> --- drivers/gpu/drm/i915/gt/selftest_tlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)