@@ -59,8 +59,7 @@ static void mmio_invalidate_full(struct intel_gt *gt)
intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
- intel_gt_mcr_lock(gt, &flags);
- spin_lock(&uncore->lock); /* serialise invalidate with GT reset */
+ mutex_lock(>->reset.mutex);/* serialise invalidate with GT reset */
awake = 0;
for_each_engine(engine, gt, id) {
@@ -68,9 +67,9 @@ static void mmio_invalidate_full(struct intel_gt *gt)
continue;
if (engine->tlb_inv.mcr)
- intel_gt_mcr_multicast_write_fw(gt,
- engine->tlb_inv.reg.mcr_reg,
- engine->tlb_inv.request);
+ intel_gt_mcr_multicast_write(gt,
+ engine->tlb_inv.reg.mcr_reg,
+ engine->tlb_inv.request);
else
intel_uncore_write_fw(uncore,
engine->tlb_inv.reg.reg,
@@ -90,8 +89,7 @@ static void mmio_invalidate_full(struct intel_gt *gt)
IS_ALDERLAKE_P(i915)))
intel_uncore_write_fw(uncore, GEN12_OA_TLB_INV_CR, 1);
- spin_unlock(&uncore->lock);
- intel_gt_mcr_unlock(gt, flags);
+ mutex_unlock(>->reset.mutex);
for_each_engine_masked(engine, gt, awake, tmp) {
if (wait_for_invalidate(engine))
Take the mcr lock only when driver needs to write into a mcr based tlb based registers. To prevent GT reset interference, employ gt->reset.mutex instead, since intel_gt_mcr_multicast_write relies on gt->uncore->lock not being held. Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> --- drivers/gpu/drm/i915/gt/intel_tlb.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-)