| Message ID | 20231009172919.1769055-7-jonathan.cavitt@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Define and use GuC and CTB TLB invalidation routines | expand |
On 09/10/2023 18:29, Jonathan Cavitt wrote: > For the gt_tlb live selftest, when operating on the GSC engine, > increase the timeout from 10 ms to 200 ms because the GSC > engine is a bit slower than the rest. And others from 10ms to 20ms. By accident or deliberate? Regards, Tvrtko > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> > --- > drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c > index 7e41f69fc818f..24beb94aa7a37 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c > +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c > @@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce, > i915_request_get(rq); > i915_request_add(rq); > > - /* Short sleep to sanitycheck the batch is spinning before we begin */ > - msleep(10); > + /* > + * Short sleep to sanitycheck the batch is spinning before we begin. > + * FIXME: Why is GSC so slow? > + */ > + if (ce->engine->class == OTHER_CLASS) > + msleep(200); > + else > + msleep(20); > + > if (va == vb) { > if (!i915_request_completed(rq)) { > pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
Hi Tvrtko, > On 09/10/2023 18:29, Jonathan Cavitt wrote: > > For the gt_tlb live selftest, when operating on the GSC engine, > > increase the timeout from 10 ms to 200 ms because the GSC > > engine is a bit slower than the rest. > > And others from 10ms to 20ms. By accident or deliberate? yes, accident :-) Andi > > > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> > > --- > > drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +++++++++-- > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c > > index 7e41f69fc818f..24beb94aa7a37 100644 > > --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c > > +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c > > @@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce, > > i915_request_get(rq); > > i915_request_add(rq); > > - /* Short sleep to sanitycheck the batch is spinning before we begin */ > > - msleep(10); > > + /* > > + * Short sleep to sanitycheck the batch is spinning before we begin. > > + * FIXME: Why is GSC so slow? > > + */ > > + if (ce->engine->class == OTHER_CLASS) > > + msleep(200); > > + else > > + msleep(20); > > + > > if (va == vb) { > > if (!i915_request_completed(rq)) { > > pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
-----Original Message----- From: Andi Shyti <andi.shyti@linux.intel.com> Sent: Tuesday, October 10, 2023 6:04 AM To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Cavitt, Jonathan <jonathan.cavitt@intel.com>; intel-gfx@lists.freedesktop.org; Gupta, saurabhg <saurabhg.gupta@intel.com>; yu.bruce.chang@intel.com; chris.p.wilson@linux.intel.com; Iddamsetty, Aravind <aravind.iddamsetty@intel.com>; Yang, Fei <fei.yang@intel.com>; Harrison, John C <john.c.harrison@intel.com>; Das, Nirmoy <nirmoy.das@intel.com>; Krzysztofik, Janusz <janusz.krzysztofik@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; jani.nikula@linux.intel.com Subject: Re: [PATCH v9 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck > > Hi Tvrtko, > > > On 09/10/2023 18:29, Jonathan Cavitt wrote: > > > For the gt_tlb live selftest, when operating on the GSC engine, > > > increase the timeout from 10 ms to 200 ms because the GSC > > > engine is a bit slower than the rest. > > > > And others from 10ms to 20ms. By accident or deliberate? > > yes, accident :-) I should've clarified in the patch that this was to resolve a CHECKPATCH error: -:29: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.rst But I wasn't sure if we were allowed to talk about such things on the mailing list. -Jonathan Cavitt > > Andi > > > > > > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> > > > --- > > > drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +++++++++-- > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c > > > index 7e41f69fc818f..24beb94aa7a37 100644 > > > --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c > > > +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c > > > @@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce, > > > i915_request_get(rq); > > > i915_request_add(rq); > > > - /* Short sleep to sanitycheck the batch is spinning before we begin */ > > > - msleep(10); > > > + /* > > > + * Short sleep to sanitycheck the batch is spinning before we begin. > > > + * FIXME: Why is GSC so slow? > > > + */ > > > + if (ce->engine->class == OTHER_CLASS) > > > + msleep(200); > > > + else > > > + msleep(20); > > > + > > > if (va == vb) { > > > if (!i915_request_completed(rq)) { > > > pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n", >
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c index 7e41f69fc818f..24beb94aa7a37 100644 --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c @@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce, i915_request_get(rq); i915_request_add(rq); - /* Short sleep to sanitycheck the batch is spinning before we begin */ - msleep(10); + /* + * Short sleep to sanitycheck the batch is spinning before we begin. + * FIXME: Why is GSC so slow? + */ + if (ce->engine->class == OTHER_CLASS) + msleep(200); + else + msleep(20); + if (va == vb) { if (!i915_request_completed(rq)) { pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
For the gt_tlb live selftest, when operating on the GSC engine, increase the timeout from 10 ms to 200 ms because the GSC engine is a bit slower than the rest. Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> --- drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)