| Message ID | 20231012193000.11917-1-vidya.srinivas@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Fix bigjoiner case for DP2.0 | expand |
On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > Patch calculates bigjoiner pipes in mst compute. > Patch also passes bigjoiner bool to validate plane > max size. I doubt this is sufficient. The modeset sequence is still all wrong for bigjoiner+mst. > > Signed-off-by: vsrini4 <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e3f176a093d2..f499ce39b2a8 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > struct intel_dp *intel_dp = &intel_mst->primary->dp; > const struct drm_display_mode *adjusted_mode = > @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > return -EINVAL; > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > + adjusted_mode->crtc_clock)) > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); > + > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > pipe_config->has_pch_encoder = false; > @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > if (ret) > return ret; > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > - *status = MODE_CLOCK_HIGH; > - return 0; > - } > - > if (mode->clock < 10000) { > *status = MODE_CLOCK_LOW; > return 0; > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > max_dotclk *= 2; > } > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > + *status = MODE_CLOCK_HIGH; > + return 0; > + } > + > if (DISPLAY_VER(dev_priv) >= 10 && > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > /* > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > if (mode_rate > max_rate && !dsc) > return MODE_CLOCK_HIGH; > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > return 0; > } > > -- > 2.33.0
> -----Original Message----- > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > Sent: Friday, October 13, 2023 4:14 PM > To: Srinivas, Vidya <vidya.srinivas@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915: Fix bigjoiner case for DP2.0 > > On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > > Patch calculates bigjoiner pipes in mst compute. > > Patch also passes bigjoiner bool to validate plane max size. > > I doubt this is sufficient. The modeset sequence is still all wrong for > bigjoiner+mst. Hello Ville, Many thanks for your reply. Could you kindly help on this issue. Just floated this patch for reference only. As you said, Monitor lights up but inconsistent also. I am not well-versed to make a proper fix. Request your help please. Thanks a lot. Regards Vidya > > > > > Signed-off-by: vsrini4 <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > > 1 file changed, 12 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > index e3f176a093d2..f499ce39b2a8 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct > intel_encoder *encoder, > > struct drm_connector_state *conn_state) > { > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > > struct intel_dp *intel_dp = &intel_mst->primary->dp; > > const struct drm_display_mode *adjusted_mode = @@ -318,6 > +319,10 @@ > > static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > > return -EINVAL; > > > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > > + adjusted_mode->crtc_clock)) > > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc- > >pipe); > > + > > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->has_pch_encoder = false; @@ -936,12 +941,6 @@ > > intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > if (ret) > > return ret; > > > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port- > >full_pbn) { > > - *status = MODE_CLOCK_HIGH; > > - return 0; > > - } > > - > > if (mode->clock < 10000) { > > *status = MODE_CLOCK_LOW; > > return 0; > > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct > drm_connector *connector, > > max_dotclk *= 2; > > } > > > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port- > >full_pbn) { > > + *status = MODE_CLOCK_HIGH; > > + return 0; > > + } > > + > > if (DISPLAY_VER(dev_priv) >= 10 && > > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > > /* > > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct > drm_connector *connector, > > if (mode_rate > max_rate && !dsc) > > return MODE_CLOCK_HIGH; > > > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, > > +bigjoiner); > > return 0; > > } > > > > -- > > 2.33.0 > > -- > Ville Syrjälä > Intel
On Fri, Oct 13, 2023 at 01:43:46PM +0300, Ville Syrjälä wrote: > On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > > Patch calculates bigjoiner pipes in mst compute. > > Patch also passes bigjoiner bool to validate plane > > max size. > > I doubt this is sufficient. The modeset sequence is still all > wrong for bigjoiner+mst. Should that be now enough with my series also? https://patchwork.freedesktop.org/series/128311/ Stan > > > > > Signed-off-by: vsrini4 <vidya.srinivas@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > > 1 file changed, 12 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > index e3f176a093d2..f499ce39b2a8 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > struct drm_connector_state *conn_state) > > { > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > > struct intel_dp *intel_dp = &intel_mst->primary->dp; > > const struct drm_display_mode *adjusted_mode = > > @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > > return -EINVAL; > > > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > > + adjusted_mode->crtc_clock)) > > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); > > + > > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->has_pch_encoder = false; > > @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > if (ret) > > return ret; > > > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > - *status = MODE_CLOCK_HIGH; > > - return 0; > > - } > > - > > if (mode->clock < 10000) { > > *status = MODE_CLOCK_LOW; > > return 0; > > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > max_dotclk *= 2; > > } > > > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > + *status = MODE_CLOCK_HIGH; > > + return 0; > > + } > > + > > if (DISPLAY_VER(dev_priv) >= 10 && > > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > > /* > > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > if (mode_rate > max_rate && !dsc) > > return MODE_CLOCK_HIGH; > > > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > > return 0; > > } > > > > -- > > 2.33.0 > > -- > Ville Syrjälä > Intel
Hi Stan, Ville, After Stan's refactor series for bigjoiner, along with Vidya's patch that assigns master/slave for MST as well, do you anticipate more MST specific bigjoiner modeset sequence changes to properly call crtc enable sequence for MST master slave? Stan, when you send the next revision for Bigjoiner refactor series, could you pull in this patch that sets the bigjoiner pipes for MST as well? That way Vidya can test all these changes together on the 6K monitor that has built in MST port and needs bigjoiner. Manasi On Wed, Jan 10, 2024 at 1:31 AM Lisovskiy, Stanislav <stanislav.lisovskiy@intel.com> wrote: > > On Fri, Oct 13, 2023 at 01:43:46PM +0300, Ville Syrjälä wrote: > > On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > > > Patch calculates bigjoiner pipes in mst compute. > > > Patch also passes bigjoiner bool to validate plane > > > max size. > > > > I doubt this is sufficient. The modeset sequence is still all > > wrong for bigjoiner+mst. > > Should that be now enough with my series also? > > https://patchwork.freedesktop.org/series/128311/ > > Stan > > > > > > > > > Signed-off-by: vsrini4 <vidya.srinivas@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > > > 1 file changed, 12 insertions(+), 7 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > index e3f176a093d2..f499ce39b2a8 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > > struct drm_connector_state *conn_state) > > > { > > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > > > struct intel_dp *intel_dp = &intel_mst->primary->dp; > > > const struct drm_display_mode *adjusted_mode = > > > @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > > > return -EINVAL; > > > > > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > > > + adjusted_mode->crtc_clock)) > > > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); > > > + > > > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > > pipe_config->has_pch_encoder = false; > > > @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > if (ret) > > > return ret; > > > > > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > > > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > > - *status = MODE_CLOCK_HIGH; > > > - return 0; > > > - } > > > - > > > if (mode->clock < 10000) { > > > *status = MODE_CLOCK_LOW; > > > return 0; > > > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > max_dotclk *= 2; > > > } > > > > > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > > > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > > + *status = MODE_CLOCK_HIGH; > > > + return 0; > > > + } > > > + > > > if (DISPLAY_VER(dev_priv) >= 10 && > > > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > > > /* > > > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > if (mode_rate > max_rate && !dsc) > > > return MODE_CLOCK_HIGH; > > > > > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > > > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > > > return 0; > > > } > > > > > > -- > > > 2.33.0 > > > > -- > > Ville Syrjälä > > Intel
Hi Stan, I discussed with Ville a little bit on IRC and wanted to reflect some conversation here as review so that it could be accommodated in your next revision for bigjoiner changes. For bigjoiner cases to work correctly, when bigjoiner steals a CRTC for using it as slave CRTC, the assumption is that it would indicate the CRTC_STATE Active bit and reflect the CRTC ACTIVE property for the stolen CRTC so that userspace understands that it is being used internally and does not try to modeset on a stolen CRTC. As per Ville's comment on IRC: <vsyrjala> no. from uapi pov the crtc is inactive Could you please elaborate on this and if it is not being correctly reflected as ACTIVE, that would be a kernel bug and needs to be fixed as part of this series. Regards Manasi On Tue, Jan 16, 2024 at 5:20 PM Manasi Navare <navaremanasi@chromium.org> wrote: > > Hi Stan, Ville, > > After Stan's refactor series for bigjoiner, along with Vidya's patch > that assigns master/slave for MST as well, do you anticipate more MST > specific > bigjoiner modeset sequence changes to properly call crtc enable > sequence for MST master slave? > > Stan, when you send the next revision for Bigjoiner refactor series, > could you pull in this patch that sets the bigjoiner pipes for MST as > well? > That way Vidya can test all these changes together on the 6K monitor > that has built in MST port and needs bigjoiner. > > Manasi > > On Wed, Jan 10, 2024 at 1:31 AM Lisovskiy, Stanislav > <stanislav.lisovskiy@intel.com> wrote: > > > > On Fri, Oct 13, 2023 at 01:43:46PM +0300, Ville Syrjälä wrote: > > > On Fri, Oct 13, 2023 at 01:00:00AM +0530, vsrini4 wrote: > > > > Patch calculates bigjoiner pipes in mst compute. > > > > Patch also passes bigjoiner bool to validate plane > > > > max size. > > > > > > I doubt this is sufficient. The modeset sequence is still all > > > wrong for bigjoiner+mst. > > > > Should that be now enough with my series also? > > > > https://patchwork.freedesktop.org/series/128311/ > > > > Stan > > > > > > > > > > > > > Signed-off-by: vsrini4 <vidya.srinivas@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- > > > > 1 file changed, 12 insertions(+), 7 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > index e3f176a093d2..f499ce39b2a8 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > > > struct drm_connector_state *conn_state) > > > > { > > > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > > > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > > > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > > > > struct intel_dp *intel_dp = &intel_mst->primary->dp; > > > > const struct drm_display_mode *adjusted_mode = > > > > @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > > > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > > > > return -EINVAL; > > > > > > > > + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, > > > > + adjusted_mode->crtc_clock)) > > > > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); > > > > + > > > > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > > > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > > > pipe_config->has_pch_encoder = false; > > > > @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > > if (ret) > > > > return ret; > > > > > > > > - if (mode_rate > max_rate || mode->clock > max_dotclk || > > > > - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > > > - *status = MODE_CLOCK_HIGH; > > > > - return 0; > > > > - } > > > > - > > > > if (mode->clock < 10000) { > > > > *status = MODE_CLOCK_LOW; > > > > return 0; > > > > @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > > max_dotclk *= 2; > > > > } > > > > > > > > + if (mode_rate > max_rate || mode->clock > max_dotclk || > > > > + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { > > > > + *status = MODE_CLOCK_HIGH; > > > > + return 0; > > > > + } > > > > + > > > > if (DISPLAY_VER(dev_priv) >= 10 && > > > > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > > > > /* > > > > @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > > > > if (mode_rate > max_rate && !dsc) > > > > return MODE_CLOCK_HIGH; > > > > > > > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > > > > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > > > > return 0; > > > > } > > > > > > > > -- > > > > 2.33.0 > > > > > > -- > > > Ville Syrjälä > > > Intel
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index e3f176a093d2..f499ce39b2a8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -308,6 +308,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); struct intel_dp *intel_dp = &intel_mst->primary->dp; const struct drm_display_mode *adjusted_mode = @@ -318,6 +319,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); + pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; @@ -936,12 +941,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, if (ret) return ret; - if (mode_rate > max_rate || mode->clock > max_dotclk || - drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { - *status = MODE_CLOCK_HIGH; - return 0; - } - if (mode->clock < 10000) { *status = MODE_CLOCK_LOW; return 0; @@ -957,6 +956,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_dotclk *= 2; } + if (mode_rate > max_rate || mode->clock > max_dotclk || + drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { + *status = MODE_CLOCK_HIGH; + return 0; + } + if (DISPLAY_VER(dev_priv) >= 10 && drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { /* @@ -994,7 +999,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, if (mode_rate > max_rate && !dsc) return MODE_CLOCK_HIGH; - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); return 0; }
Patch calculates bigjoiner pipes in mst compute. Patch also passes bigjoiner bool to validate plane max size. Signed-off-by: vsrini4 <vidya.srinivas@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-)