From patchwork Tue Oct 17 18:08:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 13425674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84DE5CDB482 for ; Tue, 17 Oct 2023 18:19:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64E7010E31A; Tue, 17 Oct 2023 18:19:02 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D2BF10E314 for ; Tue, 17 Oct 2023 18:18:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697566730; x=1729102730; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LsdlYfToWsi6sDszi0jXbuU59Jxyqs1CvzV3ZT/Mo3A=; b=Yq9bkc37MhTiMLKHRjYLsd8cQj3/kc1b0qYwkDNRmMRBdSCc20549Yh9 l91LL7SLxvLBUud1zRpxPPltPwVibihLeM2yP0E53em8c2agmPmLuJje2 iUXWwRz7wJEybVHF8U0JftSVsEnuaANvNhwyklHFjj6NQPmpOa2SOz6BT 6JtZ2frFR15KHkEZ9LfxvdfoPL1Gyun7+NMeULtFKVnyUgKp6eJwuQTQ4 bolHTqaAxKfJfDKEYrRE4sh5DTkWtXTtyRfgew9agINAmskzCS/s7GjbO 9JNe6S2QkHjw8WVVe0Cav33OBu7A9bsXaD5kAqfejlKJ4Adj5mv40BkyF Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="472078881" X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="472078881" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 11:18:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="4037624" Received: from dut-internal-9dd7.jf.intel.com ([10.165.21.194]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 11:17:43 -0700 From: Jonathan Cavitt To: intel-gfx@lists.freedesktop.org Date: Tue, 17 Oct 2023 11:08:00 -0700 Message-Id: <20231017180806.3054290-2-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231017180806.3054290-1-jonathan.cavitt@intel.com> References: <20231017180806.3054290-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v17 1/7] drm/i915: Add GuC TLB Invalidation device info flags X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com, matthew.d.roper@intel.com, jonathan.cavitt@intel.com, saurabhg.gupta@intel.com, chris.p.wilson@linux.intel.com, nirmoy.das@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add device info flags for if GuC TLB Invalidation is enabled. Signed-off-by: Jonathan Cavitt Reviewed-by: Andi Shyti Acked-by: Tvrtko Ursulin Reviewed-by: Nirmoy Das --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_device_info.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index cb60fc9cf8737..6a2a78c61f212 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -794,6 +794,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_GUC_DEPRIVILEGE(i915) \ (INTEL_INFO(i915)->has_guc_deprivilege) +#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation) + #define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline) #define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 39817490b13fd..eba2f0b919c87 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -153,6 +153,7 @@ enum intel_ppgtt_type { func(has_heci_pxp); \ func(has_heci_gscfi); \ func(has_guc_deprivilege); \ + func(has_guc_tlb_invalidation); \ func(has_l3_ccs_read); \ func(has_l3_dpf); \ func(has_llc); \