From patchwork Mon Oct 30 15:58:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13440721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 382CDC4332F for ; Mon, 30 Oct 2023 15:58:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2204810E31D; Mon, 30 Oct 2023 15:58:45 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9C24810E31E for ; Mon, 30 Oct 2023 15:58:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698681522; x=1730217522; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4p0YX8bHY9f/gN/JhDuhlsT0JWYgJYLAj7M2jOOfmHo=; b=PdE8zS9PaguJoDJ9GZkeH7Dt+1FEATPESjCwAcioWqoKbOVkDUOw3Ui6 KCFwONOkzUiKa/8CHB9MJzOXe07LLXXrYWACjWrpB7VWzE5h4sJlloHE+ iVDQek4ArEdfWq2f+yv9jne2aAfgUA541cCV83/8UXHEZ2FsGWblgSX6V T0g7OmivsQ+KvTGSqJvF4/NINxRrYyOkmTD7fxt94wdk5Sqhy7ItlF/2U glgUyU+Kw1KEBCJzLCDAkriLAIzpJXjoCFMutUzIv+LzvhXK6wPwCJq+n l41UbEwaKfZdT6smk0mvoJNtmkxdide0TanYjjg/XDWAkN2ZdfBE4Dvsh g==; X-IronPort-AV: E=McAfee;i="6600,9927,10879"; a="974481" X-IronPort-AV: E=Sophos;i="6.03,263,1694761200"; d="scan'208";a="974481" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2023 08:58:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10879"; a="789494005" X-IronPort-AV: E=Sophos;i="6.03,263,1694761200"; d="scan'208";a="789494005" Received: from ideak-desk.fi.intel.com ([10.237.72.78]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2023 08:58:40 -0700 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Mon, 30 Oct 2023 17:58:30 +0200 Message-Id: <20231030155843.2251023-18-imre.deak@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231030155843.2251023-1-imre.deak@intel.com> References: <20231030155843.2251023-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 17/30] drm/i915/dp_mst: Add missing DSC compression disabling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add the missing DSC compression disabling step for MST streams, similarly to how this is done for SST outputs. Reviewed-by: Stanislav Lisovskiy Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index cfbe3430e5ace..4ed6074125e05 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -713,6 +713,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); + intel_dsc_disable(old_crtc_state); + if (DISPLAY_VER(dev_priv) >= 9) skl_scaler_disable(old_crtc_state); else