diff mbox series

[2/5] drm/i915: Stop using a 'reg' variable

Message ID 20231101114212.9345-3-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Some register cleanups | expand

Commit Message

Ville Syrjälä Nov. 1, 2023, 11:42 a.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

'reg' is a very non-descriptive name. Just get rid of the silly
local variable and spell out the full register name always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

Comments

Jani Nikula Nov. 2, 2023, 1:29 p.m. UTC | #1
On Wed, 01 Nov 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> 'reg' is a very non-descriptive name. Just get rid of the silly
> local variable and spell out the full register name always.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1abb81981ef5..751c36679b01 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -397,7 +397,6 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
> -	i915_reg_t reg;
>  	u32 val;
>  
>  	drm_dbg_kms(&dev_priv->drm, "enabling pipe %c\n", pipe_name(pipe));
> @@ -430,16 +429,16 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
>  		intel_de_rmw(dev_priv, PIPE_ARB_CTL(pipe),
>  			     0, PIPE_ARB_USE_PROG_SLOTS);
>  
> -	reg = TRANSCONF(cpu_transcoder);
> -	val = intel_de_read(dev_priv, reg);
> +	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
>  	if (val & TRANSCONF_ENABLE) {
>  		/* we keep both pipes enabled on 830 */
>  		drm_WARN_ON(&dev_priv->drm, !IS_I830(dev_priv));
>  		return;
>  	}
>  
> -	intel_de_write(dev_priv, reg, val | TRANSCONF_ENABLE);
> -	intel_de_posting_read(dev_priv, reg);
> +	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder),
> +		       val | TRANSCONF_ENABLE);
> +	intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
>  
>  	/*
>  	 * Until the pipe starts PIPEDSL reads will return a stale value,
> @@ -458,7 +457,6 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
> -	i915_reg_t reg;
>  	u32 val;
>  
>  	drm_dbg_kms(&dev_priv->drm, "disabling pipe %c\n", pipe_name(pipe));
> @@ -469,8 +467,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	 */
>  	assert_planes_disabled(crtc);
>  
> -	reg = TRANSCONF(cpu_transcoder);
> -	val = intel_de_read(dev_priv, reg);
> +	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
>  	if ((val & TRANSCONF_ENABLE) == 0)
>  		return;
>  
> @@ -485,7 +482,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	if (!IS_I830(dev_priv))
>  		val &= ~TRANSCONF_ENABLE;
>  
> -	intel_de_write(dev_priv, reg, val);
> +	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
>  
>  	if (DISPLAY_VER(dev_priv) >= 12)
>  		intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder),
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1abb81981ef5..751c36679b01 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -397,7 +397,6 @@  void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
 	enum pipe pipe = crtc->pipe;
-	i915_reg_t reg;
 	u32 val;
 
 	drm_dbg_kms(&dev_priv->drm, "enabling pipe %c\n", pipe_name(pipe));
@@ -430,16 +429,16 @@  void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
 		intel_de_rmw(dev_priv, PIPE_ARB_CTL(pipe),
 			     0, PIPE_ARB_USE_PROG_SLOTS);
 
-	reg = TRANSCONF(cpu_transcoder);
-	val = intel_de_read(dev_priv, reg);
+	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
 	if (val & TRANSCONF_ENABLE) {
 		/* we keep both pipes enabled on 830 */
 		drm_WARN_ON(&dev_priv->drm, !IS_I830(dev_priv));
 		return;
 	}
 
-	intel_de_write(dev_priv, reg, val | TRANSCONF_ENABLE);
-	intel_de_posting_read(dev_priv, reg);
+	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder),
+		       val | TRANSCONF_ENABLE);
+	intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
 
 	/*
 	 * Until the pipe starts PIPEDSL reads will return a stale value,
@@ -458,7 +457,6 @@  void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
 	enum pipe pipe = crtc->pipe;
-	i915_reg_t reg;
 	u32 val;
 
 	drm_dbg_kms(&dev_priv->drm, "disabling pipe %c\n", pipe_name(pipe));
@@ -469,8 +467,7 @@  void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
 	 */
 	assert_planes_disabled(crtc);
 
-	reg = TRANSCONF(cpu_transcoder);
-	val = intel_de_read(dev_priv, reg);
+	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
 	if ((val & TRANSCONF_ENABLE) == 0)
 		return;
 
@@ -485,7 +482,7 @@  void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
 	if (!IS_I830(dev_priv))
 		val &= ~TRANSCONF_ENABLE;
 
-	intel_de_write(dev_priv, reg, val);
+	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
 
 	if (DISPLAY_VER(dev_priv) >= 12)
 		intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder),