diff mbox series

[1/3] drm/i915: Add meaningful traces for QGV point info error handling

Message ID 20231128083754.20096-2-stanislav.lisovskiy@intel.com (mailing list archive)
State New, archived
Headers show
Series QGV/SAGV related fixes | expand

Commit Message

Stanislav Lisovskiy Nov. 28, 2023, 8:37 a.m. UTC
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and adding those traces manually.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 4 +++-
 drivers/gpu/drm/i915/soc/intel_dram.c   | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

Comments

Gustavo Sousa Nov. 28, 2023, 12:53 p.m. UTC | #1
Quoting Stanislav Lisovskiy (2023-11-28 05:37:52-03:00)
>For debug purposes we need those - error path won't flood the log,
>however there has been already numerous cases, when due to lack
>of debugs, we couldn't immediately tell what was the problem on
>customer machine, which slowed down the investigation, requiring
>to get access to target device and adding those traces manually.
>
>Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_bw.c | 4 +++-
> drivers/gpu/drm/i915/soc/intel_dram.c   | 2 ++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
>index bef96db62c80..583cd2ebdf89 100644
>--- a/drivers/gpu/drm/i915/display/intel_bw.c
>+++ b/drivers/gpu/drm/i915/display/intel_bw.c
>@@ -289,8 +289,10 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
>                 struct intel_qgv_point *sp = &qi->points[i];
> 
>                 ret = intel_read_qgv_point_info(dev_priv, sp, i);
>-                if (ret)
>+                if (ret) {
>+                        drm_dbg_kms(&dev_priv->drm, "Could not read QGV %d info\n", i);
>                         return ret;
>+                }
> 
>                 drm_dbg_kms(&dev_priv->drm,
>                             "QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n",
>diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
>index 15492b69f698..37d61dff50a8 100644
>--- a/drivers/gpu/drm/i915/soc/intel_dram.c
>+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
>@@ -647,6 +647,8 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915)
> 
>         dram_info->num_channels = REG_FIELD_GET(MTL_N_OF_POPULATED_CH_MASK, val);
>         dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
>+        drm_dbg_kms(&i915->drm, "Num qgv points from MTL_N_OF_ENABLED_QGV_POINTS_MASK reg: %d\n",
>+                    dram_info->num_qgv_points);

Maybe use a more general message (not specific to MTL) and do this in
intel_dram_detect() instead?

--
Gustavo Sousa

>         /* PSF GV points not supported in D14+ */
> 
>         return 0;
>-- 
>2.37.3
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..583cd2ebdf89 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -289,8 +289,10 @@  static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
 		struct intel_qgv_point *sp = &qi->points[i];
 
 		ret = intel_read_qgv_point_info(dev_priv, sp, i);
-		if (ret)
+		if (ret) {
+			drm_dbg_kms(&dev_priv->drm, "Could not read QGV %d info\n", i);
 			return ret;
+		}
 
 		drm_dbg_kms(&dev_priv->drm,
 			    "QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n",
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 15492b69f698..37d61dff50a8 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -647,6 +647,8 @@  static int xelpdp_get_dram_info(struct drm_i915_private *i915)
 
 	dram_info->num_channels = REG_FIELD_GET(MTL_N_OF_POPULATED_CH_MASK, val);
 	dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
+	drm_dbg_kms(&i915->drm, "Num qgv points from MTL_N_OF_ENABLED_QGV_POINTS_MASK reg: %d\n",
+		    dram_info->num_qgv_points);
 	/* PSF GV points not supported in D14+ */
 
 	return 0;