@@ -1681,6 +1681,9 @@ struct intel_pps {
struct alpm_parameters {
u8 io_wake_lines;
u8 fast_wake_lines;
+
+ /* LNL and beyond */
+ u8 check_entry_lines;
};
struct intel_psr {
@@ -1102,6 +1102,28 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
return true;
}
+static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ struct alpm_parameters *alpm_params = &intel_dp->psr.alpm_params;
+ int check_entry_lines;
+
+ /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */
+ check_entry_lines = 2 +
+ intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5);
+
+ if (check_entry_lines > 15)
+ return false;
+
+ if (i915->display.params.psr_safest_params)
+ check_entry_lines = 15;
+
+ alpm_params->check_entry_lines = check_entry_lines;
+
+ return true;
+}
+
static bool _compute_alpm_params(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state)
{
@@ -1117,6 +1139,8 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp,
* it is not enough -> use 45 us.
*/
fast_wake_time = 45;
+
+ /* TODO: Check how we can use ALPM_CTL fast wake extended field */
max_wake_lines = 12;
} else {
io_wake_time = 50;
@@ -1133,6 +1157,10 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp,
fast_wake_lines > max_wake_lines)
return false;
+ if (DISPLAY_VER(i915) >= 20 && !_lnl_compute_alpm_params(intel_dp,
+ crtc_state))
+ return false;
+
if (i915->display.params.psr_safest_params)
io_wake_lines = fast_wake_lines = max_wake_lines;
ALPM Entry Check represents the number of lines needed to put the main link to sleep and keep it in the sleep state before it can be taken out of the SLEEP state (eDP requires the main link to be in the SLEEP state for a minimum of 5us). Bspec: 71477 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- .../drm/i915/display/intel_display_types.h | 3 ++ drivers/gpu/drm/i915/display/intel_psr.c | 28 +++++++++++++++++++ 2 files changed, 31 insertions(+)