diff mbox series

[v3,11/21] drm/i915/psr: Modify VSC SDP calculation to support panel replay + su

Message ID 20240119101024.1060812-12-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel replay selective update support | expand

Commit Message

Hogander, Jouni Jan. 19, 2024, 10:10 a.m. UTC
Current VSC SDP calculation doesn't support panel replay + su. Change it to
support this combination as well.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Manna, Animesh Feb. 2, 2024, 1:58 p.m. UTC | #1
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, January 19, 2024 3:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: [PATCH v3 11/21] drm/i915/psr: Modify VSC SDP calculation to
> support panel replay + su
> 
> Current VSC SDP calculation doesn't support panel replay + su. Change it to
> support this combination as well.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4e01182662ff..ae368d9999b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2633,14 +2633,6 @@ static void intel_dp_compute_vsc_sdp(struct
> intel_dp *intel_dp,
>  	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
>  		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
>  						 vsc);
> -	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
> -		/*
> -		 * [PSR2 without colorimetry]
> -		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
> -		 * 3D stereo + PSR/PSR2 + Y-coordinate.
> -		 */
> -		vsc->revision = 0x4;
> -		vsc->length = 0xe;
>  	} else if (crtc_state->has_panel_replay) {
>  		/*
>  		 * [Panel Replay without colorimetry info] @@ -2649,6
> +2641,14 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp
> *intel_dp,
>  		 */
>  		vsc->revision = 0x6;
>  		vsc->length = 0x10;
> +	} else if (crtc_state->has_sel_update) {
> +		/*
> +		 * [PSR2 without colorimetry]
> +		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
> +		 * 3D stereo + PSR/PSR2 + Y-coordinate.
> +		 */

The above code comments need to be modified for panel replay as well. How psr2+selective_update and pr+selective_update will be managed with the same intel_dp_compute_vsc_sdp() good to add some function description.

Regards,
Animesh 
> +		vsc->revision = 0x4;
> +		vsc->length = 0xe;
>  	} else {
>  		/*
>  		 * [PSR1]
> --
> 2.34.1
Hogander, Jouni Feb. 5, 2024, 1:43 p.m. UTC | #2
On Fri, 2024-02-02 at 13:58 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Friday, January 19, 2024 3:40 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>
> > Subject: [PATCH v3 11/21] drm/i915/psr: Modify VSC SDP calculation
> > to
> > support panel replay + su
> > 
> > Current VSC SDP calculation doesn't support panel replay + su.
> > Change it to
> > support this combination as well.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++--------
> >  1 file changed, 8 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 4e01182662ff..ae368d9999b4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2633,14 +2633,6 @@ static void intel_dp_compute_vsc_sdp(struct
> > intel_dp *intel_dp,
> >         if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> >                 intel_dp_compute_vsc_colorimetry(crtc_state,
> > conn_state,
> >                                                  vsc);
> > -       } else if (crtc_state->has_psr && crtc_state-
> > >has_sel_update) {
> > -               /*
> > -                * [PSR2 without colorimetry]
> > -                * Prepare VSC Header for SU as per eDP 1.4 spec,
> > Table 6-11
> > -                * 3D stereo + PSR/PSR2 + Y-coordinate.
> > -                */
> > -               vsc->revision = 0x4;
> > -               vsc->length = 0xe;
> >         } else if (crtc_state->has_panel_replay) {
> >                 /*
> >                  * [Panel Replay without colorimetry info] @@ -
> > 2649,6
> > +2641,14 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp
> > *intel_dp,
> >                  */
> >                 vsc->revision = 0x6;
> >                 vsc->length = 0x10;
> > +       } else if (crtc_state->has_sel_update) {
> > +               /*
> > +                * [PSR2 without colorimetry]
> > +                * Prepare VSC Header for SU as per eDP 1.4 spec,
> > Table 6-11
> > +                * 3D stereo + PSR/PSR2 + Y-coordinate.
> > +                */
> 
> The above code comments need to be modified for panel replay as well.
> How psr2+selective_update and pr+selective_update will be managed
> with the same intel_dp_compute_vsc_sdp() good to add some function
> description.

Please note that else if (crtc_state->has_panel_replay) {" is used for
both Panel Replay full frame update and Panel Replay SU.

BR,

Jouni Högander

> 
> Regards,
> Animesh 
> > +               vsc->revision = 0x4;
> > +               vsc->length = 0xe;
> >         } else {
> >                 /*
> >                  * [PSR1]
> > --
> > 2.34.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4e01182662ff..ae368d9999b4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2633,14 +2633,6 @@  static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
 		intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
 						 vsc);
-	} else if (crtc_state->has_psr && crtc_state->has_sel_update) {
-		/*
-		 * [PSR2 without colorimetry]
-		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
-		 * 3D stereo + PSR/PSR2 + Y-coordinate.
-		 */
-		vsc->revision = 0x4;
-		vsc->length = 0xe;
 	} else if (crtc_state->has_panel_replay) {
 		/*
 		 * [Panel Replay without colorimetry info]
@@ -2649,6 +2641,14 @@  static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 		 */
 		vsc->revision = 0x6;
 		vsc->length = 0x10;
+	} else if (crtc_state->has_sel_update) {
+		/*
+		 * [PSR2 without colorimetry]
+		 * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
+		 * 3D stereo + PSR/PSR2 + Y-coordinate.
+		 */
+		vsc->revision = 0x4;
+		vsc->length = 0xe;
 	} else {
 		/*
 		 * [PSR1]