diff mbox series

[2/4] drm/i915/cdclk: Squash waveform is 16 bits

Message ID 20240207013334.29606-3-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/cdclk: More hardcoded cd2x divider nukage | expand

Commit Message

Ville Syrjälä Feb. 7, 2024, 1:33 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Have cdclk_squash_waveform() return a u16 since that's
how many bits we have in the waveform. We alreday use
u16 everywhere else.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Gustavo Sousa Feb. 16, 2024, 12:15 p.m. UTC | #1 
Quoting Ville Syrjala (2024-02-06 22:33:32-03:00)
>From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>Have cdclk_squash_waveform() return a u16 since that's
>how many bits we have in the waveform. We alreday use
>u16 everywhere else.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
>index d79485e17ed1..a0013e37d53c 100644
>--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>@@ -1778,7 +1778,7 @@ static u32 bxt_cdclk_cd2x_div_sel(struct drm_i915_private *dev_priv,
>         }
> }
> 
>-static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
>+static u16 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
>                                  int cdclk)
> {
>         const struct intel_cdclk_vals *table = dev_priv->display.cdclk.table;
>-- 
>2.43.0
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index d79485e17ed1..a0013e37d53c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1778,7 +1778,7 @@  static u32 bxt_cdclk_cd2x_div_sel(struct drm_i915_private *dev_priv,
 	}
 }
 
-static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
+static u16 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
 				 int cdclk)
 {
 	const struct intel_cdclk_vals *table = dev_priv->display.cdclk.table;