From patchwork Wed Feb 14 11:24:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nemesa Garg X-Patchwork-Id: 13556343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF75CC48BEB for ; Wed, 14 Feb 2024 11:28:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C1DA10E5BA; Wed, 14 Feb 2024 11:28:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IswvESQ4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1FD6310E5BA; Wed, 14 Feb 2024 11:28:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707910104; x=1739446104; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2+YCJ/335IYb7jjbpPtlbGueH+MNrByAn8mrcTnD3iE=; b=IswvESQ4RjhcuxpeAL/8BAbK6GElxIUVqOMO5XeScuM6637vZGHL7liM BGa+zXQUUNfgCsjej4PEYwUJMZoFm9KcBtoaLK4JC73QWW1H0re9vs8JS VX+7srCblNN10/tuADCNbSJNz6sMdDKNSQQS4tZG2CR46x4i01uxFjNjZ WMWa2Qgb9wLbxC5/K/0mYzWpQL4BvXoZ/LzG+HgDCYTqmkjIwObLE6HZy dMlab+5QU1EbPevg7W4j37qz7CQNZI68r5Ydpz06tiSFmlevaQprOiNEg kQZHlgd+/N0l/Is9PhJt1N2VScaRR+JXC9s0kD4yq2rd+yqaubGwEZMAI A==; X-IronPort-AV: E=McAfee;i="6600,9927,10982"; a="1826974" X-IronPort-AV: E=Sophos;i="6.06,159,1705392000"; d="scan'208";a="1826974" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 03:28:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,159,1705392000"; d="scan'208";a="7828059" Received: from nemesa.iind.intel.com ([10.190.239.22]) by orviesa003.jf.intel.com with ESMTP; 14 Feb 2024 03:28:22 -0800 From: Nemesa Garg To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Nemesa Garg Subject: [RFC 5/5] drm/i915/display: Load the lut values and enable sharpness Date: Wed, 14 Feb 2024 16:54:57 +0530 Message-Id: <20240214112457.3734871-6-nemesa.garg@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240214112457.3734871-1-nemesa.garg@intel.com> References: <20240214112457.3734871-1-nemesa.garg@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Load the lut values during pipe enable. Signed-off-by: Nemesa Garg --- drivers/gpu/drm/i915/display/intel_crtc.c | 3 +++ drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++++- drivers/gpu/drm/i915/display/skl_scaler.c | 11 ++++++++++- 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 25593f6aae7d..74c498733283 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -383,6 +383,9 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe); + if (DISPLAY_VER(dev_priv) >= 20) + drm_crtc_create_sharpening_strength_property(&crtc->base); + return 0; fail: diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3d05bd203ca8..e8bd615e6977 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1722,6 +1722,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_crtc_wait_for_next_vblank(wa_crtc); intel_crtc_wait_for_next_vblank(wa_crtc); } + + if (new_crtc_state->hw.casf_params.strength_changed) + intel_filter_lut_load(crtc, new_crtc_state); } void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state) @@ -2444,8 +2447,12 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state, if (crtc_state->has_pch_encoder) return ilk_fdi_compute_config(crtc, crtc_state); - if (crtc_state->hw.casf_params.strength_changed) + intel_sharpen_strength_changed(state); + + if (crtc_state->hw.casf_params.strength_changed) { intel_sharpness_scaler_compute_config(crtc_state); + intel_filter_compute_config(crtc_state); + } return 0; } @@ -6744,6 +6751,9 @@ static void intel_update_crtc(struct intel_atomic_state *state, if (intel_crtc_needs_fastset(new_crtc_state) && old_crtc_state->inherited) intel_crtc_arm_fifo_underrun(crtc, new_crtc_state); + + if (new_crtc_state->hw.casf_params.strength_changed) + intel_sharpen_filter_enable(new_crtc_state); } static void intel_old_crtc_state_disables(struct intel_atomic_state *state, diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index be61a6ebd7e3..cb828b3880b2 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -925,7 +925,7 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state) /* find scaler attached to this pipe */ for (i = 0; i < crtc->num_scalers; i++) { - u32 ctl, pos, size; + u32 ctl, pos, size, sharp; ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i)); if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN | PS_BINDING_PIPE)) @@ -933,6 +933,15 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state) id = i; + sharp = intel_de_read(dev_priv, SHARPNESS_CTL(crtc->pipe)); + if (sharp & FILTER_EN) { + crtc_state->hw.casf_params.strength = + REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) - 16; + crtc_state->hw.casf_params.need_scaler = true; + crtc_state->hw.casf_params.win_size = + REG_FIELD_GET(FILTER_SIZE_MASK, sharp); + } + if (!crtc_state->hw.casf_params.need_scaler) crtc_state->pch_pfit.enabled = true;