From patchwork Fri Mar 1 07:49:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Charlton Lin X-Patchwork-Id: 13578102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 31628C5478C for ; Fri, 1 Mar 2024 07:49:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 83AEA10EBD6; Fri, 1 Mar 2024 07:49:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="FRGDr+aW"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 535DE10E78D for ; Fri, 1 Mar 2024 07:49:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709279380; x=1740815380; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=uCg0tDdBJYqtMJYMzmvxwnSGCw2PGU0U8Dw3gEuTxAY=; b=FRGDr+aW1h9L+Df0SZnPbpVe5Diaa5SQOUcC418u4tOZZO9uTuBXCz5S S4iFmbYKG2Q3dVYt6kemaaBWFNHhEhJQ1JR2M8IDOpMnlg7hwlKANo5L1 OZyQ5HVBWcoZSLUzymCb/yGg/BxdqbqyqCW8vYTgWsV0jkCM3lMicqJvB +90PdJhuqH6Viubrvcu9wL2PC1/Iu1hpreL0wcKBzQ4IF/vSt6a0zs9F7 Rt6PFWEOk1/4lzrS1nJ7qJo/BNwZHmZXikSHMAGcdE1IZPaHKDgaIWuQU 5FlIZbz2bETzUwjzfyKMemyKUf6aWiBm15QUuTnn2SU/XiYCH+5NesRev g==; X-IronPort-AV: E=McAfee;i="6600,9927,10999"; a="4383186" X-IronPort-AV: E=Sophos;i="6.06,195,1705392000"; d="scan'208";a="4383186" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Feb 2024 23:49:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,195,1705392000"; d="scan'208";a="8012718" Received: from charlton-desk1.sc.intel.com ([172.25.235.211]) by fmviesa007.fm.intel.com with ESMTP; 29 Feb 2024 23:49:40 -0800 From: Charlton Lin To: intel-gfx@lists.freedesktop.org Cc: Charlton Lin , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Khaled Almahallawy , Sean Paul Subject: [RFC] drm/i915/dp: Log message when limiting SST link rate MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Date: Thu, 29 Feb 2024 23:49:23 -0800 Message-Id: <20240301074923.485807-1-charlton.lin@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Driver currently limits link rate up to HBR3 in SST mode. Log a message with monitor vendor, product id, and MSTM_CAP to help understand what monitors are being downgraded by this limit. Cc: Ville Syrjälä Cc: Khaled Almahallawy Cc: Sean Paul Signed-off-by: Charlton Lin --- drivers/gpu/drm/i915/display/intel_dp.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 6ece2c563c7a..0b2d6d88fd37 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2437,6 +2437,25 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, false, &limits); + if (intel_dp_max_common_rate(intel_dp) > limits.max_rate) { + u8 mstm_cap; + u32 panel_id = drm_edid_get_panel_id(&intel_dp->aux.ddc); + char vend[4]; + u16 product_id; + + drm_dbg_kms(&i915->drm, + "Limiting LR from max common rate %d to %d\n", + intel_dp_max_common_rate(intel_dp), limits.max_rate); + + drm_edid_decode_panel_id(panel_id, vend, &product_id); + + if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_12 && + drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) == 1) + drm_dbg_kms(&i915->drm, + "Manufacturer=%s Model=%x Sink MSTM_CAP=%x\n", + vend, product_id, mstm_cap); + } + if (!dsc_needed) { /* * Optimize for slow and wide for everything, because there are some