| Message ID | 20240319123327.1661097-6-jouni.hogander@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Wa_16021440873 and early transport fixes | expand |
> -----Original Message----- > From: Hogander, Jouni <jouni.hogander@intel.com> > Sent: Tuesday, March 19, 2024 2:33 PM > To: intel-gfx@lists.freedesktop.org > Cc: Kahola, Mika <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com> > Subject: [PATCH 5/5] drm/i915/display: Implement Wa_16021440873 > > This patch is implementing Wa_16021440873. > > Bspec: 74151 > Reviewed-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cursor.c | 24 ++++++++++++++++++++- > drivers/gpu/drm/i915/display/intel_psr.c | 20 +++++++++++------ > 2 files changed, 37 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c > index f8b33999d43f..838d1a723ff1 100644 > --- a/drivers/gpu/drm/i915/display/intel_cursor.c > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c > @@ -511,6 +511,24 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane, > intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0); } > > +static void wa_16021440873(struct intel_plane *plane, > + const struct intel_crtc_state *crtc_state, > + const struct intel_plane_state *plane_state) { > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > + u32 ctl = plane_state->ctl; > + int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1; > + enum pipe pipe = plane->pipe; > + > + ctl &= ~MCURSOR_MODE_MASK; > + ctl |= MCURSOR_MODE_64_2B; > + > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), > +ctl); > + > + intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe), > + PIPESRC_HEIGHT(et_y_position)); } > + > static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state) @@ -531,7 +549,11 @@ static void > i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane, > intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), > plane_state->ctl); > } else { > - i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state); > + /* Wa_16021440873 */ > + if (crtc_state->enable_psr2_su_region_et) > + wa_16021440873(plane, crtc_state, plane_state); > + else > + i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state); > } > } > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index e1a9399aa503..7ecf1b35c1ef 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -2082,14 +2082,19 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, > crtc_state->psr2_man_track_ctl = val; > } > > -static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state, > - bool full_update) > +static u32 > +psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state, > + bool full_update, bool cursor_in_su_area) > { > int width, height; > > if (!crtc_state->enable_psr2_su_region_et || full_update) > return 0; > > + if (!cursor_in_su_area) > + return PIPESRC_WIDTH(0) | > + PIPESRC_HEIGHT(drm_rect_height(&crtc_state->pipe_src)); > + > width = drm_rect_width(&crtc_state->psr2_su_area); > height = drm_rect_height(&crtc_state->psr2_su_area); > > @@ -2141,7 +2146,8 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st > */ > static void > intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > + struct intel_crtc *crtc, > + bool *cursor_in_su_area) > { > struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > struct intel_plane_state *new_plane_state; @@ -2169,6 +2175,7 @@ intel_psr2_sel_fetch_et_alignment(struct > intel_atomic_state *state, > > clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst, > &crtc_state->pipe_src); > + *cursor_in_su_area = true; > } > } > > @@ -2214,7 +2221,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > struct intel_plane_state *new_plane_state, *old_plane_state; > struct intel_plane *plane; > - bool full_update = false; > + bool full_update = false, cursor_in_su_area = false; > int i, ret; > > if (!crtc_state->enable_psr2_sel_fetch) > @@ -2331,7 +2338,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > * drm_atomic_add_affected_planes to ensure visible cursor is added into > * affected planes even when cursor is not updated by itself. > */ > - intel_psr2_sel_fetch_et_alignment(state, crtc); > + intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area); > > intel_psr2_sel_fetch_pipe_alignment(crtc_state); > > @@ -2395,7 +2402,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > skip_sel_fetch_set_loop: > psr2_man_trk_ctl_calc(crtc_state, full_update); > crtc_state->pipe_srcsz_early_tpt = > - psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update); > + psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update, > + cursor_in_su_area); > return 0; > } > > -- > 2.34.1
On Thu, 2024-03-28 at 12:57 +0000, Kahola, Mika wrote: > > -----Original Message----- > > From: Hogander, Jouni <jouni.hogander@intel.com> > > Sent: Tuesday, March 19, 2024 2:33 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: Kahola, Mika <mika.kahola@intel.com>; Hogander, Jouni > > <jouni.hogander@intel.com> > > Subject: [PATCH 5/5] drm/i915/display: Implement Wa_16021440873 > > > > This patch is implementing Wa_16021440873. > > > > Bspec: 74151 > > > > Reviewed-by: Mika Kahola <mika.kahola@intel.com> Thank you Mika for your review. These are now pushed to drm-intel-next. BR, Jouni Högander > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_cursor.c | 24 > > ++++++++++++++++++++- > > drivers/gpu/drm/i915/display/intel_psr.c | 20 +++++++++++------ > > 2 files changed, 37 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c > > b/drivers/gpu/drm/i915/display/intel_cursor.c > > index f8b33999d43f..838d1a723ff1 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cursor.c > > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c > > @@ -511,6 +511,24 @@ static void > > i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane, > > intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, > > plane->id), 0); } > > > > +static void wa_16021440873(struct intel_plane *plane, > > + const struct intel_crtc_state > > *crtc_state, > > + const struct intel_plane_state > > *plane_state) { > > + struct drm_i915_private *dev_priv = to_i915(plane- > > >base.dev); > > + u32 ctl = plane_state->ctl; > > + int et_y_position = drm_rect_height(&crtc_state->pipe_src) > > + 1; > > + enum pipe pipe = plane->pipe; > > + > > + ctl &= ~MCURSOR_MODE_MASK; > > + ctl |= MCURSOR_MODE_64_2B; > > + > > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, > > plane->id), > > +ctl); > > + > > + intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe), > > + PIPESRC_HEIGHT(et_y_position)); } > > + > > static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane > > *plane, > > const struct > > intel_crtc_state *crtc_state, > > const struct > > intel_plane_state *plane_state) @@ -531,7 +549,11 @@ static void > > i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane, > > intel_de_write_fw(dev_priv, > > PLANE_SEL_FETCH_CTL(pipe, plane->id), > > plane_state->ctl); > > } else { > > - i9xx_cursor_disable_sel_fetch_arm(plane, > > crtc_state); > > + /* Wa_16021440873 */ > > + if (crtc_state->enable_psr2_su_region_et) > > + wa_16021440873(plane, crtc_state, > > plane_state); > > + else > > + i9xx_cursor_disable_sel_fetch_arm(plane, > > crtc_state); > > } > > } > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > b/drivers/gpu/drm/i915/display/intel_psr.c > > index e1a9399aa503..7ecf1b35c1ef 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -2082,14 +2082,19 @@ static void psr2_man_trk_ctl_calc(struct > > intel_crtc_state *crtc_state, > > crtc_state->psr2_man_track_ctl = val; > > } > > > > -static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state > > *crtc_state, > > - bool full_update) > > +static u32 > > +psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state > > *crtc_state, > > + bool full_update, bool > > cursor_in_su_area) > > { > > int width, height; > > > > if (!crtc_state->enable_psr2_su_region_et || full_update) > > return 0; > > > > + if (!cursor_in_su_area) > > + return PIPESRC_WIDTH(0) | > > + PIPESRC_HEIGHT(drm_rect_height(&crtc_state- > > >pipe_src)); > > + > > width = drm_rect_width(&crtc_state->psr2_su_area); > > height = drm_rect_height(&crtc_state->psr2_su_area); > > > > @@ -2141,7 +2146,8 @@ static void > > intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state > > *crtc_st > > */ > > static void > > intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state > > *state, > > - struct intel_crtc *crtc) > > + struct intel_crtc *crtc, > > + bool *cursor_in_su_area) > > { > > struct intel_crtc_state *crtc_state = > > intel_atomic_get_new_crtc_state(state, crtc); > > struct intel_plane_state *new_plane_state; @@ -2169,6 > > +2175,7 @@ intel_psr2_sel_fetch_et_alignment(struct > > intel_atomic_state *state, > > > > clip_area_update(&crtc_state->psr2_su_area, > > &new_plane_state->uapi.dst, > > &crtc_state->pipe_src); > > + *cursor_in_su_area = true; > > } > > } > > > > @@ -2214,7 +2221,7 @@ int intel_psr2_sel_fetch_update(struct > > intel_atomic_state *state, > > struct intel_crtc_state *crtc_state = > > intel_atomic_get_new_crtc_state(state, crtc); > > struct intel_plane_state *new_plane_state, > > *old_plane_state; > > struct intel_plane *plane; > > - bool full_update = false; > > + bool full_update = false, cursor_in_su_area = false; > > int i, ret; > > > > if (!crtc_state->enable_psr2_sel_fetch) > > @@ -2331,7 +2338,7 @@ int intel_psr2_sel_fetch_update(struct > > intel_atomic_state *state, > > * drm_atomic_add_affected_planes to ensure visible cursor > > is added into > > * affected planes even when cursor is not updated by > > itself. > > */ > > - intel_psr2_sel_fetch_et_alignment(state, crtc); > > + intel_psr2_sel_fetch_et_alignment(state, crtc, > > &cursor_in_su_area); > > > > intel_psr2_sel_fetch_pipe_alignment(crtc_state); > > > > @@ -2395,7 +2402,8 @@ int intel_psr2_sel_fetch_update(struct > > intel_atomic_state *state, > > skip_sel_fetch_set_loop: > > psr2_man_trk_ctl_calc(crtc_state, full_update); > > crtc_state->pipe_srcsz_early_tpt = > > - psr2_pipe_srcsz_early_tpt_calc(crtc_state, > > full_update); > > + psr2_pipe_srcsz_early_tpt_calc(crtc_state, > > full_update, > > + cursor_in_su_area); > > return 0; > > } > > > > -- > > 2.34.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index f8b33999d43f..838d1a723ff1 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -511,6 +511,24 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane, intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0); } +static void wa_16021440873(struct intel_plane *plane, + const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state) +{ + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + u32 ctl = plane_state->ctl; + int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1; + enum pipe pipe = plane->pipe; + + ctl &= ~MCURSOR_MODE_MASK; + ctl |= MCURSOR_MODE_64_2B; + + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), ctl); + + intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe), + PIPESRC_HEIGHT(et_y_position)); +} + static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) @@ -531,7 +549,11 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane, intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), plane_state->ctl); } else { - i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state); + /* Wa_16021440873 */ + if (crtc_state->enable_psr2_su_region_et) + wa_16021440873(plane, crtc_state, plane_state); + else + i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state); } } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e1a9399aa503..7ecf1b35c1ef 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2082,14 +2082,19 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, crtc_state->psr2_man_track_ctl = val; } -static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state, - bool full_update) +static u32 +psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state, + bool full_update, bool cursor_in_su_area) { int width, height; if (!crtc_state->enable_psr2_su_region_et || full_update) return 0; + if (!cursor_in_su_area) + return PIPESRC_WIDTH(0) | + PIPESRC_HEIGHT(drm_rect_height(&crtc_state->pipe_src)); + width = drm_rect_width(&crtc_state->psr2_su_area); height = drm_rect_height(&crtc_state->psr2_su_area); @@ -2141,7 +2146,8 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st */ static void intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state, - struct intel_crtc *crtc) + struct intel_crtc *crtc, + bool *cursor_in_su_area) { struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct intel_plane_state *new_plane_state; @@ -2169,6 +2175,7 @@ intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state, clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst, &crtc_state->pipe_src); + *cursor_in_su_area = true; } } @@ -2214,7 +2221,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct intel_plane_state *new_plane_state, *old_plane_state; struct intel_plane *plane; - bool full_update = false; + bool full_update = false, cursor_in_su_area = false; int i, ret; if (!crtc_state->enable_psr2_sel_fetch) @@ -2331,7 +2338,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, * drm_atomic_add_affected_planes to ensure visible cursor is added into * affected planes even when cursor is not updated by itself. */ - intel_psr2_sel_fetch_et_alignment(state, crtc); + intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area); intel_psr2_sel_fetch_pipe_alignment(crtc_state); @@ -2395,7 +2402,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, skip_sel_fetch_set_loop: psr2_man_trk_ctl_calc(crtc_state, full_update); crtc_state->pipe_srcsz_early_tpt = - psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update); + psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update, + cursor_in_su_area); return 0; }
This patch is implementing Wa_16021440873. Bspec: 74151 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- drivers/gpu/drm/i915/display/intel_cursor.c | 24 ++++++++++++++++++++- drivers/gpu/drm/i915/display/intel_psr.c | 20 +++++++++++------ 2 files changed, 37 insertions(+), 7 deletions(-)