diff mbox series

[v9,5/6] drm/i915/display: handle systems with duplicate qgv/psf gv points

Message ID 20240326231021.281780-6-vinod.govindapillai@intel.com (mailing list archive)
State New, archived
Headers show
Series QGV/SAGV related fixes | expand

Commit Message

Govindapillai, Vinod March 26, 2024, 11:10 p.m. UTC 
From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

There could be multiple qgv and psf gv points with similar values
In case if we need to set one such QGV or psf gv  point where there
could be duplicate entries, we would have to select all those
points. Otherwise pcode might reject the GV configuration. We do
handle this when we set appropriate qgv and psf gv as part of
intel_bw_atomic_check calls. But during the bw_init force disable
QGV points phase, we need to select all those points corresponding
to the maximum bw as well.

v1: - use the same treatment to qgv points as well (Vinod)

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 5f4f93524bef..f6690d545d95 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -847,6 +847,8 @@  static unsigned int icl_max_bw_qgv_point_mask(struct drm_i915_private *i915,
 		if (max_data_rate > max_bw) {
 			max_bw_point_mask = BIT(i);
 			max_bw = max_data_rate;
+		} else if (max_data_rate == max_bw) {
+			max_bw_point_mask |= BIT(i);
 		}
 	}
 
@@ -874,6 +876,8 @@  static unsigned int icl_max_bw_psf_gv_point_mask(struct drm_i915_private *i915)
 		if (max_data_rate > max_bw) {
 			max_bw_point_mask = BIT(i);
 			max_bw = max_data_rate;
+		} else if (max_data_rate == max_bw) {
+			max_bw_point_mask |= BIT(i);
 		}
 	}