From patchwork Wed Apr 3 11:22:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Balasubramani Vivekanandan X-Patchwork-Id: 13615970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C26FFCD1288 for ; Wed, 3 Apr 2024 11:23:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2EFE2112236; Wed, 3 Apr 2024 11:23:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ie0lwNS+"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 941A7112A17; Wed, 3 Apr 2024 11:22:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712143380; x=1743679380; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nFSyzKrDtDqDcvfqRCvLYsCntufo5yT5P8lczjLoZrs=; b=ie0lwNS+glOjm816XjYYqvg7hWrNb/ilW79Sf+lL1Yr7GhKMsZQIQFZP KfegFGL1VytpeXt3c6SvWkhFzOK0Q5Iwmhbxd/myI9Mwjcfjxe5HHZdub lzI2z9NLSz+Eh/xnUQHsoOspFHsqB1EZZE7JX0CcuVGEMp2f/3f3qtIi9 qXh6YPrhPQlvUfGPc6zNvS26CbyYb6DWOJj2ZDRy/DY/nLekhKKFjH3WI xsw1sNpLE3n6MQa0MV7+TlwUHoVUZAXfFWoGWxU8hfOEJdLZXCVWlJOO1 S4ogpYpXvT2PqWLa3UZ3Yw8c2cw3aQVyTSrhggi765fyJASIzniMyMfni Q==; X-CSE-ConnectionGUID: Gv26QzCoQpWYvvG6oZy8YQ== X-CSE-MsgGUID: S92AaKkfQ6abvL/0ehIipA== X-IronPort-AV: E=McAfee;i="6600,9927,11032"; a="24824042" X-IronPort-AV: E=Sophos;i="6.07,177,1708416000"; d="scan'208";a="24824042" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 04:23:00 -0700 X-CSE-ConnectionGUID: GSZxGguJT1aaeoXHmGOcPg== X-CSE-MsgGUID: +B8vGS7jSvecs7jvIrVpgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,177,1708416000"; d="scan'208";a="18358506" Received: from bvivekan-desk.iind.intel.com ([10.190.238.63]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 04:22:58 -0700 From: Balasubramani Vivekanandan To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Matt Roper , Lucas De Marchi , Clint Taylor , Balasubramani Vivekanandan Subject: [PATCH v2 06/25] drm/i915/xe2hpd: Initial cdclk table Date: Wed, 3 Apr 2024 16:52:34 +0530 Message-Id: <20240403112253.1432390-7-balasubramani.vivekanandan@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240403112253.1432390-1-balasubramani.vivekanandan@intel.com> References: <20240403112253.1432390-1-balasubramani.vivekanandan@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Clint Taylor Add Xe2_HPD specific CDCLK table and use MTL Funcs. Bspec: 65243 Cc: Matt Roper CC: Lucas De Marchi Signed-off-by: Clint Taylor Signed-off-by: Balasubramani Vivekanandan Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_cdclk.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 31aaa9780dfc..da16c308670f 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1444,6 +1444,14 @@ static const struct intel_cdclk_vals xe2lpd_cdclk_table[] = { {} }; +/* + * Xe2_HPD always uses the minimal cdclk table from Wa_15015413771 + */ +static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = { + { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff }, + {} +}; + static const int cdclk_squash_len = 16; static int cdclk_squash_divider(u16 waveform) @@ -3768,6 +3776,9 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) if (DISPLAY_VER(dev_priv) >= 20) { dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs; dev_priv->display.cdclk.table = xe2lpd_cdclk_table; + } else if (DISPLAY_VER_FULL(dev_priv) >= IP_VER(14, 1)) { + dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs; + dev_priv->display.cdclk.table = xe2hpd_cdclk_table; } else if (DISPLAY_VER(dev_priv) >= 14) { dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs; dev_priv->display.cdclk.table = mtl_cdclk_table;