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[24/35] drm/i915/bios: Define VBT block 25 (SDVO LVDS PPS) contents

Message ID 20240503122449.27266-25-ville.syrjala@linux.intel.com (mailing list archive)
State New
Headers show
Series drm/i915/bios: Define (almost) all BDB blocks | expand

Commit Message

Ville Syrjala May 3, 2024, 12:24 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Define the contents of VBT block 25 (SDVO LVDS PPS).

Not 100% sure about the order of the fields as this is not
documented in the VBT spec anymore, but this order matches
what is included as part of the power sequencing SDVO commands
(struct sdvo_panel_power_sequencing). Also the real world
VBT data I have looks OK with this definition.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 8fe2ded884e3..c6d03905593d 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -972,6 +972,22 @@  struct bdb_sdvo_lvds_pnp_id {
 	struct bdb_edid_pnp_id pnp_id[4];
 } __packed;
 
+/*
+ * Block 25 - SDVO LVDS PPS
+ */
+
+struct sdvo_lvds_pps {
+	u16 t0; /* power on */
+	u16 t1; /* backlight on */
+	u16 t2; /* backlight off */
+	u16 t3; /* power off */
+	u16 t4; /* power cycle */
+} __packed;
+
+struct bdb_sdvo_lvds_pps {
+	struct sdvo_lvds_pps pps[4];
+} __packed;
+
 /*
  * Block 27 - eDP VBT Block
  */