diff mbox series

[19/20] drm/i915/dp: Add debugfs entry to force link retrain

Message ID 20240514191418.2863344-20-imre.deak@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/dp_mst: Enable link training fallback | expand

Commit Message

Imre Deak May 14, 2024, 7:14 p.m. UTC
Add a connector debugfs entry to force retrain an active link. This can
be used to test both custom link parameters (previously set via the
target link lane count/rate entries) or link train failure scenarios
(previously forced via the force-failure entry). The entry will
autoreset after the link-retrain is complete.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 46 +++++++++++++++++++
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 18 ++++++--
 3 files changed, 60 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 098d0f5190723..4f19d30e6972f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1569,6 +1569,49 @@  DEFINE_DEBUGFS_ATTRIBUTE(i915_dp_force_link_training_failure_fops,
 			 i915_dp_force_link_training_failure_show,
 			 i915_dp_force_link_training_failure_write, "%llu\n");
 
+static int i915_dp_force_link_retrain_show(void *data, u64 *val)
+{
+	struct intel_connector *connector = to_intel_connector(data);
+	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct intel_dp *intel_dp;
+	int err;
+
+	err = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
+	if (err)
+		return err;
+
+	intel_dp = intel_connector_to_intel_dp(connector);
+	*val = intel_dp->link_train.force_retrain;
+
+	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
+
+	return 0;
+}
+
+static int i915_dp_force_link_retrain_write(void *data, u64 val)
+{
+	struct intel_connector *connector = to_intel_connector(data);
+	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct intel_dp *intel_dp;
+	int err;
+
+	err = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
+	if (err)
+		return err;
+
+	intel_dp = intel_connector_to_intel_dp(connector);
+
+	intel_dp->link_train.force_retrain = val;
+	intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
+
+	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
+
+	return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(i915_dp_force_link_retrain_fops,
+			 i915_dp_force_link_retrain_show,
+			 i915_dp_force_link_retrain_write, "%llu\n");
+
 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
 {
 	struct intel_connector *connector = m->private;
@@ -1786,6 +1829,9 @@  void intel_connector_debugfs_add(struct intel_connector *connector)
 
 		debugfs_create_file("i915_dp_force_link_training_failure", 0644, root,
 				    connector, &i915_dp_force_link_training_failure_fops);
+
+		debugfs_create_file("i915_dp_force_link_retrain", 0644, root,
+				    connector, &i915_dp_force_link_retrain_fops);
 	}
 
 	if (DISPLAY_VER(i915) >= 11 &&
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 62acec5236052..345e2883d9cfc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1769,6 +1769,7 @@  struct intel_dp {
 		/* Sequential failures after a passing LT */
 		int seq_failures;
 		int force_failure;
+		bool force_retrain;
 	} link_train;
 	bool reset_link_params;
 	int mso_link_count;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 367970f956863..28842ae51039a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5042,7 +5042,7 @@  intel_dp_check_mst_status(struct intel_dp *intel_dp)
 			drm_dp_mst_hpd_irq_send_new_request(&intel_dp->mst_mgr);
 	}
 
-	if (!link_ok)
+	if (!link_ok || intel_dp->link_train.force_retrain)
 		intel_dp_queue_link_check(intel_dp, 0);
 
 	return !reprobe_needed;
@@ -5091,6 +5091,9 @@  intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
 	if (intel_psr_enabled(intel_dp))
 		return false;
 
+	if (intel_dp->link_train.force_retrain)
+		return true;
+
 	if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,
 					     link_status) < 0)
 		return false;
@@ -5229,8 +5232,9 @@  static int intel_dp_retrain_link(struct intel_encoder *encoder,
 	if (!intel_dp_needs_link_retrain(intel_dp))
 		return 0;
 
-	drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] retraining link\n",
-		    encoder->base.base.id, encoder->base.name);
+	drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] retraining link (forced %s)\n",
+		    encoder->base.base.id, encoder->base.name,
+		    str_yes_no(intel_dp->link_train.force_retrain));
 
 	for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, pipe_mask) {
 		const struct intel_crtc_state *crtc_state =
@@ -5258,7 +5262,7 @@  static int intel_dp_retrain_link(struct intel_encoder *encoder,
 				    encoder->base.base.id, encoder->base.name,
 				    ERR_PTR(ret));
 
-		return ret;
+		goto out;
 	}
 
 	for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, pipe_mask) {
@@ -5285,7 +5289,11 @@  static int intel_dp_retrain_link(struct intel_encoder *encoder,
 							      intel_crtc_pch_transcoder(crtc), true);
 	}
 
-	return 0;
+out:
+	if (ret != -EDEADLK)
+		intel_dp->link_train.force_retrain = false;
+
+	return ret;
 }
 
 static void intel_dp_link_check_work_fn(struct work_struct *work)