| Message ID | 20240530060408.67027-8-mitulkumar.ajitkumar.golani@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Implement CMRR Support | expand |
On 5/30/2024 11:34 AM, Mitul Golani wrote: > Compute params for Adaptive Sync SDP when Fixed Average Vtotal > mode is enabled. > > --v2: > Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). > > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 95cf586f3bed..7007a509363a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2627,7 +2627,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > > - if (!crtc_state->vrr.enable || > + if (!(crtc_state->vrr.enable || crtc_state->cmrr.enable) || This is not required, vrr.enable is set even when cmrr.enable is set. > !intel_dp_as_sdp_supported(intel_dp)) > return; > > @@ -2636,11 +2636,20 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, > /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ > as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; > as_sdp->length = 0x9; > - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; > - as_sdp->vtotal = adjusted_mode->vtotal; > - as_sdp->target_rr = 0; > as_sdp->duration_incr_ms = 0; > as_sdp->duration_incr_ms = 0; > + > + if (crtc_state->vrr.enable) { I think there is a typo here, it should be crtc_state->cmrr.enable Regards, Ankit > + as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; > + as_sdp->vtotal = adjusted_mode->vtotal; > + as_sdp->target_rr = DIV_ROUND_UP(adjusted_mode->clock * 1000, > + adjusted_mode->htotal * adjusted_mode->vtotal); > + as_sdp->target_rr_divider = true; > + } else{ > + as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; > + as_sdp->vtotal = adjusted_mode->vtotal; > + as_sdp->target_rr = 0; > + } > } > > static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 95cf586f3bed..7007a509363a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2627,7 +2627,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!crtc_state->vrr.enable || + if (!(crtc_state->vrr.enable || crtc_state->cmrr.enable) || !intel_dp_as_sdp_supported(intel_dp)) return; @@ -2636,11 +2636,20 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; as_sdp->length = 0x9; - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; - as_sdp->vtotal = adjusted_mode->vtotal; - as_sdp->target_rr = 0; as_sdp->duration_incr_ms = 0; as_sdp->duration_incr_ms = 0; + + if (crtc_state->vrr.enable) { + as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; + as_sdp->vtotal = adjusted_mode->vtotal; + as_sdp->target_rr = DIV_ROUND_UP(adjusted_mode->clock * 1000, + adjusted_mode->htotal * adjusted_mode->vtotal); + as_sdp->target_rr_divider = true; + } else{ + as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; + as_sdp->vtotal = adjusted_mode->vtotal; + as_sdp->target_rr = 0; + } } static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
Compute params for Adaptive Sync SDP when Fixed Average Vtotal mode is enabled. --v2: Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)