From patchwork Tue Jul 9 03:26:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13727225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E3AABC3271E for ; Tue, 9 Jul 2024 03:26:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A5EA10E47F; Tue, 9 Jul 2024 03:26:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QRgCQ+/E"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A47310E47A for ; Tue, 9 Jul 2024 03:26:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1720495571; x=1752031571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6Yc8EUu97yz15Bq8u58gNMIhIKyW73BfvIMv5Oigm38=; b=QRgCQ+/E2FNzVmlXTS0EqY7UKdWXhn4iabp+eBubnPsUrC5dzQ3wMh0z 8dHk7bjOZ3oaMGLncFF/Kz2XYJHh15hkMtqQ2vc3rsjunqAYIArq67+LM If7g4Ohi3hdFFByF2vicn+g17t0DMhUxcowm2pp+oW09SrPoB0fwS22XW R5pq27hVyCpvzu8uoEaPi9D88zQ+ya+7Szje5MfymizYuzvQRhkyRv4Du 0f2kdZ/rpv+tpzly8D/KWAPBfVAxs2+alROXr6YUifgOEm2dOTv7kl8NC dbs4cHgQe4dMOSkGJpp1R2J1egg4qwrmI1FwN0twkFk8/ArZIkHEOgLkw g==; X-CSE-ConnectionGUID: foQPLBY7SKeefKulKXaR0A== X-CSE-MsgGUID: Gpr0pVFvS2emxPZ7AT6hKQ== X-IronPort-AV: E=McAfee;i="6700,10204,11127"; a="21536465" X-IronPort-AV: E=Sophos;i="6.09,193,1716274800"; d="scan'208";a="21536465" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 20:26:11 -0700 X-CSE-ConnectionGUID: xXM6/2B6TGSzUjFYq5x9Hw== X-CSE-MsgGUID: +nqZS4dcSB+j5+JzwJGBjQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,193,1716274800"; d="scan'208";a="48374193" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 20:26:09 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 06/10] drm/i915/display: Disable PSR before disabling VRR Date: Tue, 9 Jul 2024 08:56:47 +0530 Message-Id: <20240709032651.1824185-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240709032651.1824185-1-ankit.k.nautiyal@intel.com> References: <20240709032651.1824185-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 85695dc2b2e5..a979931a081b 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1182,6 +1182,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (vrr_disabling(old_crtc_state, new_crtc_state)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1192,8 +1194,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc);