From patchwork Mon Jul 22 08:27:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13738545 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23625C3DA5D for ; Mon, 22 Jul 2024 08:26:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A6E7410E414; Mon, 22 Jul 2024 08:26:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="maI3WqJa"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 602D610E411 for ; Mon, 22 Jul 2024 08:26:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721636773; x=1753172773; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2u6rjuClwUjethBj4zM/vZK0aYf4TDfZHZLFrN8ua8o=; b=maI3WqJac9C47mYFiF3BnrZndysLBk3A//j6QyONV9p3QgLA1SrSaFZY IytYt1bkkInlqzr4Jm9UmvI2erSdKuTf09Gfz0aPxsj6s+dRwuIEI+b3/ XNL593PCHOfv+rsj4iPQhl3AssSj2I7zX9hB0f79r4aO7sECYJJHcJaco 6WL0ZPcQxS83cuU52rlzupe45lq9v48MOPmGoIPZLLqrmjWkwpMKLx4Y9 B2sUfPB+dpeseL/YrEZte2tb4mS7DVQynN77GIpZz3ReMUccNY4WeBLZ3 AVIVnUVrzQPFtpj90Omd2G5YU6/7f/ylV8lY6Df1mM3K115g25Mxfrwk3 g==; X-CSE-ConnectionGUID: GXPOtCjVRviW8CijOUfVug== X-CSE-MsgGUID: z8fm1j0AQjui5tzVH0OC4Q== X-IronPort-AV: E=McAfee;i="6700,10204,11140"; a="29806944" X-IronPort-AV: E=Sophos;i="6.09,227,1716274800"; d="scan'208";a="29806944" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 01:26:13 -0700 X-CSE-ConnectionGUID: 1wI0O6bgTjGRP+A5rAbzkw== X-CSE-MsgGUID: FJF8Q5TiS/aAduz6Hm918A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,227,1716274800"; d="scan'208";a="51752916" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 01:26:11 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 06/10] drm/i915/display: Disable PSR before disabling VRR Date: Mon, 22 Jul 2024 13:57:01 +0530 Message-ID: <20240722082705.3635041-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722082705.3635041-1-ankit.k.nautiyal@intel.com> References: <20240722082705.3635041-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ecfd77c0b741..95fe58613bf6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1192,6 +1192,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1202,8 +1204,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc);