diff mbox series

drm/i915/dg2: Enable Wa_14019159160 for DG2

Message ID 20240806005719.215874-1-John.C.Harrison@Intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dg2: Enable Wa_14019159160 for DG2 | expand

Commit Message

John Harrison Aug. 6, 2024, 12:57 a.m. UTC 
From: John Harrison <John.C.Harrison@Intel.com>

The context switch hold out workaround also applies to DG2.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c     | 3 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

Comments

Andi Shyti Aug. 7, 2024, 2:16 p.m. UTC | #1 
Hi John,

On Mon, Aug 05, 2024 at 05:57:19PM -0700, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The context switch hold out workaround also applies to DG2.
> 
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

Thanks,
Andi
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 097fc6bd1285e..2a27bc625abe1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -296,7 +296,8 @@  static u32 guc_ctl_wa_flags(struct intel_guc *guc)
 
 	/* Wa_16019325821 */
 	/* Wa_14019159160 */
-	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
+	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) ||
+	    IS_DG2(gt->i915))
 		flags |= GUC_WA_RCS_CCS_SWITCHOUT;
 
 	/*
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 46fabbfc775e0..2378e3c59def9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -849,7 +849,8 @@  static void guc_waklv_init(struct intel_guc *guc)
 	remain = guc_ads_waklv_size(guc);
 
 	/* Wa_14019159160 */
-	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) {
+	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) ||
+	    IS_DG2(gt->i915)) {
 		guc_waklv_enable_simple(guc, &offset, &remain,
 					GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE);
 		guc_waklv_enable_simple(guc, &offset, &remain,