Message ID | 20240809000646.1747507-1-John.C.Harrison@Intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/guc: Fix missing enable of Wa_14019159160 on ARL | expand |
On 8/9/2024 2:06 AM, John.C.Harrison@Intel.com wrote: > From: John Harrison<John.C.Harrison@Intel.com> > > The previous update to enable the workaround on ARL only changed two > out of three places where the w/a needs to be enabled. That meant the > GuC side was operational but not the KMD side. And as the KMD side is > the trigger, it meant the w/a was not actually active. So fix that. > > Fixes: 104bcfae57d8 ("drm/i915/arl: Enable Wa_14019159160 for ARL") > Cc: John Harrison<John.C.Harrison@Intel.com> > Cc: Vinay Belgaumkar<vinay.belgaumkar@intel.com> > Cc: Daniele Ceraolo Spurio<daniele.ceraolospurio@intel.com> > Cc: Andi Shyti<andi.shyti@linux.intel.com> > Cc: Lucas De Marchi<lucas.demarchi@intel.com> > Cc: Rodrigo Vivi<rodrigo.vivi@intel.com> > Cc: Matt Roper<matthew.d.roper@intel.com> > Cc: Jonathan Cavitt<jonathan.cavitt@intel.com> > Cc: Nirmoy Das<nirmoy.das@intel.com> > Cc: Shuicheng Lin<shuicheng.lin@intel.com> > Signed-off-by: John Harrison<John.C.Harrison@Intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 9400d0eb682b2..3e1c3bc56daf2 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -4506,7 +4506,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine) > /* Wa_16019325821 */ > /* Wa_14019159160 */ > if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && > - IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71))) > + IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) > engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT; > > /*
Hi Johna, On Thu, Aug 08, 2024 at 05:06:46PM -0700, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > The previous update to enable the workaround on ARL only changed two > out of three places where the w/a needs to be enabled. That meant the > GuC side was operational but not the KMD side. And as the KMD side is > the trigger, it meant the w/a was not actually active. So fix that. > > Fixes: 104bcfae57d8 ("drm/i915/arl: Enable Wa_14019159160 for ARL") > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> > Cc: Nirmoy Das <nirmoy.das@intel.com> > Cc: Shuicheng Lin <shuicheng.lin@intel.com> > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Thanks, Andi
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 9400d0eb682b2..3e1c3bc56daf2 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -4506,7 +4506,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine) /* Wa_16019325821 */ /* Wa_14019159160 */ if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && - IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71))) + IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT; /*