| Message ID | 20240827141356.3024760-1-dnyaneshwar.bhadane@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/mtl: Update PLL c20 phy value for DP uhbr20 | expand |
On 27-08-2024 19:43, Dnyaneshwar Bhadane wrote: > Update mtl c20 phy DP table for uhbr20 values according to the revised > specifications. > > Bspec: 74165 > Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Looks good Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 4a6c3040ca15..f73d576fd99e 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -923,10 +923,10 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = { > }, > .mplla = { 0x3104, /* mplla cfg0 */ > 0xd105, /* mplla cfg1 */ > - 0xc025, /* mplla cfg2 */ > - 0xc025, /* mplla cfg3 */ > - 0xa6ab, /* mplla cfg4 */ > - 0x8c00, /* mplla cfg5 */ > + 0x9217, /* mplla cfg2 */ > + 0x9217, /* mplla cfg3 */ > + 0x8c00, /* mplla cfg4 */ > + 0x759a, /* mplla cfg5 */ > 0x4000, /* mplla cfg6 */ > 0x0003, /* mplla cfg7 */ > 0x3555, /* mplla cfg8 */
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 4a6c3040ca15..f73d576fd99e 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -923,10 +923,10 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = { }, .mplla = { 0x3104, /* mplla cfg0 */ 0xd105, /* mplla cfg1 */ - 0xc025, /* mplla cfg2 */ - 0xc025, /* mplla cfg3 */ - 0xa6ab, /* mplla cfg4 */ - 0x8c00, /* mplla cfg5 */ + 0x9217, /* mplla cfg2 */ + 0x9217, /* mplla cfg3 */ + 0x8c00, /* mplla cfg4 */ + 0x759a, /* mplla cfg5 */ 0x4000, /* mplla cfg6 */ 0x0003, /* mplla cfg7 */ 0x3555, /* mplla cfg8 */
Update mtl c20 phy DP table for uhbr20 values according to the revised specifications. Bspec: 74165 Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)