Message ID | 20240905115505.3629087-6-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Implement Wa_14021768792 to bypass m_n ratio limit | expand |
On Thu, 05 Sep 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote: > Modify the condition for WA as per Xe WA framework. Please don't. This won't work in the future. See [1]. BR, Jani. [1] https://lore.kernel.org/r/87frqdnp09.fsf@intel.com > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > drivers/gpu/drm/i915/display/intel_display_wa.h | 2 ++ > drivers/gpu/drm/xe/display/xe_display_wa.c | 5 +++++ > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + > 4 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index f55a85f04ce5..4496ba30d64d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -75,6 +75,7 @@ > #include "intel_display_driver.h" > #include "intel_display_power.h" > #include "intel_display_types.h" > +#include "intel_display_wa.h" > #include "intel_dmc.h" > #include "intel_dp.h" > #include "intel_dp_link_training.h" > @@ -3436,8 +3437,7 @@ int bmg_can_bypass_m_n_limit(struct intel_display *display, > { > struct drm_i915_private *i915 = to_i915(display->drm); > > - if (DISPLAY_VER(display) != 14 || !IS_DGFX(i915) || > - !IS_DISPLAY_STEP(display, STEP_C0, STEP_FOREVER)) > + if (!intel_display_needs_wa_14021768792(i915)) > return false; > > if (pipe != PIPE_A) > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h > index be644ab6ae00..10c1b5787d05 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_wa.h > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h > @@ -14,8 +14,10 @@ void intel_display_wa_apply(struct drm_i915_private *i915); > > #ifdef I915 > static inline bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) { return false; } > +static inline bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915) { return false; } > #else > bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915); > +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915); > #endif > > #endif > diff --git a/drivers/gpu/drm/xe/display/xe_display_wa.c b/drivers/gpu/drm/xe/display/xe_display_wa.c > index 68e3d1959ad6..c4728e61e190 100644 > --- a/drivers/gpu/drm/xe/display/xe_display_wa.c > +++ b/drivers/gpu/drm/xe/display/xe_display_wa.c > @@ -14,3 +14,8 @@ bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) > { > return XE_WA(xe_root_mmio_gt(i915), 16023588340); > } > + > +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915) > +{ > + return XE_WA(xe_root_mmio_gt(i915), 14021768792); > +} > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index 920ca5060146..a7cc2c2d98d0 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -37,3 +37,4 @@ > 16023588340 GRAPHICS_VERSION(2001) > 14019789679 GRAPHICS_VERSION(1255) > GRAPHICS_VERSION_RANGE(1270, 2004) > +14021768792 PLATFORM(BATTLEMAGE), GRAPHICS_STEP(C0, FOREVER)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f55a85f04ce5..4496ba30d64d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -75,6 +75,7 @@ #include "intel_display_driver.h" #include "intel_display_power.h" #include "intel_display_types.h" +#include "intel_display_wa.h" #include "intel_dmc.h" #include "intel_dp.h" #include "intel_dp_link_training.h" @@ -3436,8 +3437,7 @@ int bmg_can_bypass_m_n_limit(struct intel_display *display, { struct drm_i915_private *i915 = to_i915(display->drm); - if (DISPLAY_VER(display) != 14 || !IS_DGFX(i915) || - !IS_DISPLAY_STEP(display, STEP_C0, STEP_FOREVER)) + if (!intel_display_needs_wa_14021768792(i915)) return false; if (pipe != PIPE_A) diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h index be644ab6ae00..10c1b5787d05 100644 --- a/drivers/gpu/drm/i915/display/intel_display_wa.h +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h @@ -14,8 +14,10 @@ void intel_display_wa_apply(struct drm_i915_private *i915); #ifdef I915 static inline bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) { return false; } +static inline bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915) { return false; } #else bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915); +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915); #endif #endif diff --git a/drivers/gpu/drm/xe/display/xe_display_wa.c b/drivers/gpu/drm/xe/display/xe_display_wa.c index 68e3d1959ad6..c4728e61e190 100644 --- a/drivers/gpu/drm/xe/display/xe_display_wa.c +++ b/drivers/gpu/drm/xe/display/xe_display_wa.c @@ -14,3 +14,8 @@ bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) { return XE_WA(xe_root_mmio_gt(i915), 16023588340); } + +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915) +{ + return XE_WA(xe_root_mmio_gt(i915), 14021768792); +} diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index 920ca5060146..a7cc2c2d98d0 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -37,3 +37,4 @@ 16023588340 GRAPHICS_VERSION(2001) 14019789679 GRAPHICS_VERSION(1255) GRAPHICS_VERSION_RANGE(1270, 2004) +14021768792 PLATFORM(BATTLEMAGE), GRAPHICS_STEP(C0, FOREVER)
Modify the condition for WA as per Xe WA framework. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display_wa.h | 2 ++ drivers/gpu/drm/xe/display/xe_display_wa.c | 5 +++++ drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + 4 files changed, 10 insertions(+), 2 deletions(-)