| Message ID | 20240919082339.1310635-1-sk.anirban@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3] drm/i915/selftests: Implement frequency check for energy reading validation | expand |
On 19-09-2024 13:53, Sk Anirban wrote: > This commit introduces a frequency check mechanism aimed at ensuring > the accuracy of energy readings. > > v2: > - Improved commit message. > v3: > - Used pr_err log to display frequency. (Anshuman) > - Sorted headers alphabetically. (Sai Teja) > > Signed-off-by: Sk Anirban <sk.anirban@intel.com> > --- > drivers/gpu/drm/i915/gt/selftest_rc6.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c > index 1aa1446c8fb0..8fd6be7b826e 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c > +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c > @@ -8,6 +8,7 @@ > #include "intel_gpu_commands.h" > #include "intel_gt_requests.h" > #include "intel_ring.h" > +#include "intel_rps.h" > #include "selftest_rc6.h" > > #include "selftests/i915_random.h" > @@ -38,6 +39,8 @@ int live_rc6_manual(void *arg) > ktime_t dt; > u64 res[2]; > int err = 0; > + u32 rc0_freq, rc6_freq; > + struct intel_rps *rps = >->rps; > > /* > * Our claim is that we can "encourage" the GPU to enter rc6 at will. > @@ -66,6 +69,7 @@ int live_rc6_manual(void *arg) > rc0_power = librapl_energy_uJ() - rc0_power; > dt = ktime_sub(ktime_get(), dt); > res[1] = rc6_residency(rc6); > + rc0_freq = intel_rps_read_actual_frequency(rps); > if ((res[1] - res[0]) >> 10) { > pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n", > (res[1] - res[0]) >> 10); > @@ -91,6 +95,7 @@ int live_rc6_manual(void *arg) > dt = ktime_get(); > rc6_power = librapl_energy_uJ(); > msleep(100); > + rc6_freq = intel_rps_read_actual_frequency(rps); > rc6_power = librapl_energy_uJ() - rc6_power; > dt = ktime_sub(ktime_get(), dt); > res[1] = rc6_residency(rc6); > @@ -108,7 +113,8 @@ int live_rc6_manual(void *arg) > pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", > rc0_power, rc6_power); > if (2 * rc6_power > rc0_power) { > - pr_err("GPU leaked energy while in RC6!\n"); > + pr_err("GPU leaked energy while in RC6!\nGPU Freq: %u in RC6 and %u in RC0\n", Probably we could have the complete log in a single line without having \n in between? We usually never split logs like this as far as I know. But other than that, looks good. Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> > + rc6_freq, rc0_freq); > err = -EINVAL; > goto out_unlock; > }
> -----Original Message----- > From: Pottumuttu, Sai Teja <sai.teja.pottumuttu@intel.com> > Sent: Thursday, September 19, 2024 2:39 PM > To: Anirban, Sk <sk.anirban@intel.com>; intel-gfx@lists.freedesktop.org; Gupta, > Anshuman <anshuman.gupta@intel.com> > Cc: Poosa, Karthik <karthik.poosa@intel.com>; Pottumuttu, Sai Teja > <sai.teja.pottumuttu@intel.com> > Subject: Re: [PATCH v3] drm/i915/selftests: Implement frequency check for > energy reading validation > > > On 19-09-2024 13:53, Sk Anirban wrote: > > This commit introduces a frequency check mechanism aimed at ensuring > > the accuracy of energy readings. > > > > v2: > > - Improved commit message. > > v3: > > - Used pr_err log to display frequency. (Anshuman) > > - Sorted headers alphabetically. (Sai Teja) > > > > Signed-off-by: Sk Anirban <sk.anirban@intel.com> > > --- > > drivers/gpu/drm/i915/gt/selftest_rc6.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c > > b/drivers/gpu/drm/i915/gt/selftest_rc6.c > > index 1aa1446c8fb0..8fd6be7b826e 100644 > > --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c > > +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c > > @@ -8,6 +8,7 @@ > > #include "intel_gpu_commands.h" > > #include "intel_gt_requests.h" > > #include "intel_ring.h" > > +#include "intel_rps.h" > > #include "selftest_rc6.h" > > > > #include "selftests/i915_random.h" > > @@ -38,6 +39,8 @@ int live_rc6_manual(void *arg) > > ktime_t dt; > > u64 res[2]; > > int err = 0; > > + u32 rc0_freq, rc6_freq; > > + struct intel_rps *rps = >->rps; > > > > /* > > * Our claim is that we can "encourage" the GPU to enter rc6 at will. > > @@ -66,6 +69,7 @@ int live_rc6_manual(void *arg) > > rc0_power = librapl_energy_uJ() - rc0_power; > > dt = ktime_sub(ktime_get(), dt); > > res[1] = rc6_residency(rc6); > > + rc0_freq = intel_rps_read_actual_frequency(rps); > > if ((res[1] - res[0]) >> 10) { > > pr_err("RC6 residency increased by %lldus while disabled for > 1000ms!\n", > > (res[1] - res[0]) >> 10); > > @@ -91,6 +95,7 @@ int live_rc6_manual(void *arg) > > dt = ktime_get(); > > rc6_power = librapl_energy_uJ(); > > msleep(100); > > + rc6_freq = intel_rps_read_actual_frequency(rps); > > rc6_power = librapl_energy_uJ() - rc6_power; > > dt = ktime_sub(ktime_get(), dt); > > res[1] = rc6_residency(rc6); > > @@ -108,7 +113,8 @@ int live_rc6_manual(void *arg) > > pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", > > rc0_power, rc6_power); > > if (2 * rc6_power > rc0_power) { > > - pr_err("GPU leaked energy while in RC6!\n"); > > + pr_err("GPU leaked energy while in RC6!\nGPU Freq: > %u in RC6 and > > +%u in RC0\n", > > Probably we could have the complete log in a single line without having \n in > between? We usually never split logs like this as far as I know. > > But other than that, looks good. @Anirban, Sk Please address above comment form Sai. > > Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> > > > + rc6_freq, rc0_freq); > > err = -EINVAL; > > goto out_unlock; > > }
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 1aa1446c8fb0..8fd6be7b826e 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -8,6 +8,7 @@ #include "intel_gpu_commands.h" #include "intel_gt_requests.h" #include "intel_ring.h" +#include "intel_rps.h" #include "selftest_rc6.h" #include "selftests/i915_random.h" @@ -38,6 +39,8 @@ int live_rc6_manual(void *arg) ktime_t dt; u64 res[2]; int err = 0; + u32 rc0_freq, rc6_freq; + struct intel_rps *rps = >->rps; /* * Our claim is that we can "encourage" the GPU to enter rc6 at will. @@ -66,6 +69,7 @@ int live_rc6_manual(void *arg) rc0_power = librapl_energy_uJ() - rc0_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); + rc0_freq = intel_rps_read_actual_frequency(rps); if ((res[1] - res[0]) >> 10) { pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n", (res[1] - res[0]) >> 10); @@ -91,6 +95,7 @@ int live_rc6_manual(void *arg) dt = ktime_get(); rc6_power = librapl_energy_uJ(); msleep(100); + rc6_freq = intel_rps_read_actual_frequency(rps); rc6_power = librapl_energy_uJ() - rc6_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); @@ -108,7 +113,8 @@ int live_rc6_manual(void *arg) pr_info("GPU consumed %llduW in RC0 and %llduW in RC6\n", rc0_power, rc6_power); if (2 * rc6_power > rc0_power) { - pr_err("GPU leaked energy while in RC6!\n"); + pr_err("GPU leaked energy while in RC6!\nGPU Freq: %u in RC6 and %u in RC0\n", + rc6_freq, rc0_freq); err = -EINVAL; goto out_unlock; }
This commit introduces a frequency check mechanism aimed at ensuring the accuracy of energy readings. v2: - Improved commit message. v3: - Used pr_err log to display frequency. (Anshuman) - Sorted headers alphabetically. (Sai Teja) Signed-off-by: Sk Anirban <sk.anirban@intel.com> --- drivers/gpu/drm/i915/gt/selftest_rc6.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)