| Message ID | 20240926043332.1284692-2-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/vdsc: Add bpc check in intel_dsc_compute_params | expand |
Hello Suraj > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Suraj > Kandpal > Sent: Thursday, September 26, 2024 10:04 AM > To: intel-gfx@lists.freedesktop.org > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj > <suraj.kandpal@intel.com> > Subject: [PATCH] drm/i915/vdsc: Add bpc check in > intel_dsc_compute_params > > DSC does not support bpc under 8. Return an error if that happens to be the > case. > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c > b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 8158e3702ed5..39bf8bee106c 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -297,6 +297,11 @@ int intel_dsc_compute_params(struct > intel_crtc_state *pipe_config) > > vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; > > + if (vdsc_cfg->bites_per_pixel < 8) { Typo: bits_per_pixel Any Bspec link for this limitation? Regards Chaitanya > + drm_dbg_kms(&dev_priv->drm, "DSC bpc requirements not > met\n"); > + return -EINVAL; > + } > + > /* > * According to DSC 1.2 specs in Section 4.1 if native_420 is set > * we need to double the current bpp. > -- > 2.43.2
> -----Original Message----- > From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com> > Sent: Thursday, September 26, 2024 10:30 AM > To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel- > gfx@lists.freedesktop.org > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj > <suraj.kandpal@intel.com> > Subject: RE: [PATCH] drm/i915/vdsc: Add bpc check in > intel_dsc_compute_params > > Hello Suraj > > > -----Original Message----- > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of > > Suraj Kandpal > > Sent: Thursday, September 26, 2024 10:04 AM > > To: intel-gfx@lists.freedesktop.org > > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj > > <suraj.kandpal@intel.com> > > Subject: [PATCH] drm/i915/vdsc: Add bpc check in > > intel_dsc_compute_params > > > > DSC does not support bpc under 8. Return an error if that happens to > > be the case. > > > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c > > b/drivers/gpu/drm/i915/display/intel_vdsc.c > > index 8158e3702ed5..39bf8bee106c 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > > @@ -297,6 +297,11 @@ int intel_dsc_compute_params(struct > > intel_crtc_state *pipe_config) > > > > vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; > > > > + if (vdsc_cfg->bites_per_pixel < 8) { > > Typo: bits_per_pixel > Yes that should be component > Any Bspec link for this limitation? In DSC1.2a under 2)requirements the input bpc can be 8,10,12,14 and 16 Regards, Suraj Kandpal > > Regards > > Chaitanya > > > + drm_dbg_kms(&dev_priv->drm, "DSC bpc requirements not > > met\n"); > > + return -EINVAL; > > + } > > + > > /* > > * According to DSC 1.2 specs in Section 4.1 if native_420 is set > > * we need to double the current bpp. > > -- > > 2.43.2
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Suraj > Kandpal > Sent: Thursday, September 26, 2024 10:04 AM > To: intel-gfx@lists.freedesktop.org > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj > <suraj.kandpal@intel.com> > Subject: [PATCH] drm/i915/vdsc: Add bpc check in > intel_dsc_compute_params > > DSC does not support bpc under 8. Return an error if that happens to be the > case. > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c > b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 8158e3702ed5..39bf8bee106c 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -297,6 +297,11 @@ int intel_dsc_compute_params(struct > intel_crtc_state *pipe_config) > > vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; > > + if (vdsc_cfg->bites_per_pixel < 8) { > + drm_dbg_kms(&dev_priv->drm, "DSC bpc requirements not > met\n"); > + return -EINVAL; > + } > + Check for minimum bits_per_pixel must be according to output pixel format. For 444, it's 8. For 422, it's 7. For 420, it's 6. Moreover, the failure reported was on minimum BPC, not on minimum BPP. We should be checking vdsc_cfg->bits_per_component. > /* > * According to DSC 1.2 specs in Section 4.1 if native_420 is set > * we need to double the current bpp. > -- > 2.43.2
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 8158e3702ed5..39bf8bee106c 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -297,6 +297,11 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; + if (vdsc_cfg->bites_per_pixel < 8) { + drm_dbg_kms(&dev_priv->drm, "DSC bpc requirements not met\n"); + return -EINVAL; + } + /* * According to DSC 1.2 specs in Section 4.1 if native_420 is set * we need to double the current bpp.
DSC does not support bpc under 8. Return an error if that happens to be the case. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +++++ 1 file changed, 5 insertions(+)