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[1/7] drm/i915/dp: Use HAS_DSC macro in intel_dp_dsc_max_src_input_bpc

Message ID 20241003104343.984060-2-ankit.k.nautiyal@intel.com (mailing list archive)
State New
Headers show
Series DP DSC min/max src bpc fixes | expand

Commit Message

Nautiyal, Ankit K Oct. 3, 2024, 10:43 a.m. UTC
Use HAS_DSC macro to take into account platforms for which DSC is fused.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Suraj Kandpal Oct. 3, 2024, 11:04 a.m. UTC | #1
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Thursday, October 3, 2024 4:14 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Kandpal, Suraj
> <suraj.kandpal@intel.com>; jani.nikula@linux.intel.com
> Subject: [PATCH 1/7] drm/i915/dp: Use HAS_DSC macro in
> intel_dp_dsc_max_src_input_bpc
> 
> Use HAS_DSC macro to take into account platforms for which DSC is fused.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

LGTM
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index c4fdae5097ec..c47748905506 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1766,6 +1766,9 @@ intel_dp_compute_link_config_wide(struct
> intel_dp *intel_dp,  static
>  u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)  {
> +	if (!HAS_DSC(i915))
> +		return 0;
> +
>  	/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
>  	if (DISPLAY_VER(i915) >= 12)
>  		return 12;
> --
> 2.45.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c4fdae5097ec..c47748905506 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1766,6 +1766,9 @@  intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
 static
 u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
 {
+	if (!HAS_DSC(i915))
+		return 0;
+
 	/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
 	if (DISPLAY_VER(i915) >= 12)
 		return 12;