diff mbox series

drm/i915/display/dp: Reduce log level for SOURCE OUI write failures

Message ID 20241004210816.3976058-1-clinton.a.taylor@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/display/dp: Reduce log level for SOURCE OUI write failures | expand

Commit Message

Clint Taylor Oct. 4, 2024, 9:08 p.m. UTC
Some devices NAK DPCD writes to the SOURCE OUI (0x300) DPCD registers.
Reduce the log level priority to prevent dmesg noise for these devices.

Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fbb096be02ad..9920ec1f9c53 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3418,7 +3418,7 @@  intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
 	}
 
 	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
-		drm_err(&i915->drm, "Failed to write source OUI\n");
+		drm_info(&i915->drm, "Failed to write source OUI\n");
 
 	intel_dp->last_oui_write = jiffies;
 }