diff mbox series

[08/12] drm/i915/xe3lpd: Increase resolution for plane to support 6k

Message ID 20241018204941.73473-9-matthew.s.atwood@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/xe3lpd: ptl display patches | expand

Commit Message

Matt Atwood Oct. 18, 2024, 8:49 p.m. UTC
From: Suraj Kandpal <suraj.kandpal@intel.com>

DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
Increase pipe and plane max width and height to reflect this
increase in resolution.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c       |  5 ++++-
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 ++++++++++++-
 2 files changed, 16 insertions(+), 2 deletions(-)

Comments

Suraj Kandpal Oct. 19, 2024, 7:07 a.m. UTC | #1
> -----Original Message-----
> From: Atwood, Matthew S <matthew.s.atwood@intel.com>
> Sent: Saturday, October 19, 2024 2:20 AM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Murthy, Arun R
> <arun.r.murthy@intel.com>; Atwood, Matthew S
> <matthew.s.atwood@intel.com>
> Subject: [PATCH 08/12] drm/i915/xe3lpd: Increase resolution for plane to
> support 6k
> 
> From: Suraj Kandpal <suraj.kandpal@intel.com>
> 
> DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
> Increase pipe and plane max width and height to reflect this increase in
> resolution.

Hi Matt I have already floated this series upstream maybe we can remove this from
These 4 patches from the series

Regards,
Suraj Kandpal
> 
> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       |  5 ++++-
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 ++++++++++++-
>  2 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 90669c7f988b..72150f257969 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8452,7 +8452,10 @@ intel_mode_valid_max_plane_size(struct
> drm_i915_private *dev_priv,
>  	 * plane so let's not advertize modes that are
>  	 * too big for that.
>  	 */
> -	if (DISPLAY_VER(dev_priv) >= 11) {
> +	if (DISPLAY_VER(dev_priv) >= 30) {
> +		plane_width_max = 6144;
> +		plane_height_max = 4096;
> +	} else if (DISPLAY_VER(dev_priv) >= 11) {
>  		plane_width_max = 5120 * num_joined_pipes;
>  		plane_height_max = 4320;
>  	} else {
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index da974f4a25bd..bd7786a6161a 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -431,6 +431,13 @@ static int icl_plane_min_width(const struct
> drm_framebuffer *fb,
>  	}
>  }
> 
> +static int xe3_plane_max_width(const struct drm_framebuffer *fb,
> +				   int color_plane,
> +				   unsigned int rotation)
> +{
> +	return 6144;
> +}
> +
>  static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
>  				   int color_plane,
>  				   unsigned int rotation)
> @@ -2589,7 +2596,11 @@ skl_universal_plane_create(struct
> drm_i915_private *dev_priv,
> 
>  	intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
> 
> -	if (DISPLAY_VER(dev_priv) >= 11) {
> +	if (DISPLAY_VER(dev_priv) >= 30) {
> +		plane->max_width = xe3_plane_max_width;
> +		plane->max_height = icl_plane_max_height;
> +		plane->min_cdclk = icl_plane_min_cdclk;
> +	}else if (DISPLAY_VER(dev_priv) >= 11) {
>  		plane->min_width = icl_plane_min_width;
>  		if (icl_is_hdr_plane(dev_priv, plane_id))
>  			plane->max_width = icl_hdr_plane_max_width;
> --
> 2.45.0
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 90669c7f988b..72150f257969 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8452,7 +8452,10 @@  intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
 	 * plane so let's not advertize modes that are
 	 * too big for that.
 	 */
-	if (DISPLAY_VER(dev_priv) >= 11) {
+	if (DISPLAY_VER(dev_priv) >= 30) {
+		plane_width_max = 6144;
+		plane_height_max = 4096;
+	} else if (DISPLAY_VER(dev_priv) >= 11) {
 		plane_width_max = 5120 * num_joined_pipes;
 		plane_height_max = 4320;
 	} else {
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index da974f4a25bd..bd7786a6161a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -431,6 +431,13 @@  static int icl_plane_min_width(const struct drm_framebuffer *fb,
 	}
 }
 
+static int xe3_plane_max_width(const struct drm_framebuffer *fb,
+				   int color_plane,
+				   unsigned int rotation)
+{
+	return 6144;
+}
+
 static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
 				   int color_plane,
 				   unsigned int rotation)
@@ -2589,7 +2596,11 @@  skl_universal_plane_create(struct drm_i915_private *dev_priv,
 
 	intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
 
-	if (DISPLAY_VER(dev_priv) >= 11) {
+	if (DISPLAY_VER(dev_priv) >= 30) {
+		plane->max_width = xe3_plane_max_width;
+		plane->max_height = icl_plane_max_height;
+		plane->min_cdclk = icl_plane_min_cdclk;
+	}else if (DISPLAY_VER(dev_priv) >= 11) {
 		plane->min_width = icl_plane_min_width;
 		if (icl_is_hdr_plane(dev_priv, plane_id))
 			plane->max_width = icl_hdr_plane_max_width;