diff mbox series

[08/16] drm/i915/display: Add macro HAS_PIXEL_REPLICATION

Message ID 20241021123414.3993899-9-ankit.k.nautiyal@intel.com (mailing list archive)
State New
Headers show
Series Add support for 3 VDSC engines 12 slices | expand

Commit Message

Nautiyal, Ankit K Oct. 21, 2024, 12:34 p.m. UTC
Add macro for Pixel replication support with DSC.
Bspec: 49259, 68912.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Jani Nikula Oct. 21, 2024, 12:49 p.m. UTC | #1
On Mon, 21 Oct 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add macro for Pixel replication support with DSC.

Add blank line here.

> Bspec: 49259, 68912.
>

Remove blank line here.

> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 071a36b51f79..a21b910879df 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -149,6 +149,9 @@ enum intel_display_subplatform {
>  #define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
> +#define HAS_PIXEL_REPLICATION(i915)	(HAS_DSC(i915) && \
> +					 (DISPLAY_VER(i915) >= 20 || \
> +					  DISPLAY_VER_FULL(i915) == IP_VER(14, 1)))
>  #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
>  #define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
>  #define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)
Nautiyal, Ankit K Oct. 22, 2024, 4:02 a.m. UTC | #2
On 10/21/2024 6:19 PM, Jani Nikula wrote:
> On Mon, 21 Oct 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Add macro for Pixel replication support with DSC.
> Add blank line here.
>
>> Bspec: 49259, 68912.
>>
> Remove blank line here.

Noted will have Bspec as first line of the trailer.

Regards,

Ankit

>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display_device.h | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 071a36b51f79..a21b910879df 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -149,6 +149,9 @@ enum intel_display_subplatform {
>>   #define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
>>   #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
>>   #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
>> +#define HAS_PIXEL_REPLICATION(i915)	(HAS_DSC(i915) && \
>> +					 (DISPLAY_VER(i915) >= 20 || \
>> +					  DISPLAY_VER_FULL(i915) == IP_VER(14, 1)))
>>   #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
>>   #define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
>>   #define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 071a36b51f79..a21b910879df 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -149,6 +149,9 @@  enum intel_display_subplatform {
 #define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
 #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
+#define HAS_PIXEL_REPLICATION(i915)	(HAS_DSC(i915) && \
+					 (DISPLAY_VER(i915) >= 20 || \
+					  DISPLAY_VER_FULL(i915) == IP_VER(14, 1)))
 #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
 #define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)