@@ -794,7 +794,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
hsw_ips_disable(crtc_state)) {
crtc_state->ips_enabled = false;
- intel_crtc_wait_for_next_vblank(crtc);
+ intel_plane_initial_vblank_wait(plane);
}
/*
@@ -808,7 +808,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
*/
if (HAS_GMCH(dev_priv) &&
intel_set_memory_cxsr(dev_priv, false))
- intel_crtc_wait_for_next_vblank(crtc);
+ intel_plane_initial_vblank_wait(plane);
/*
* Gen2 reports pipe underruns whenever all planes are disabled.
@@ -818,7 +818,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);
intel_plane_disable_arm(NULL, plane, crtc_state);
- intel_crtc_wait_for_next_vblank(crtc);
+ intel_plane_initial_vblank_wait(plane);
}
unsigned int
@@ -14,6 +14,13 @@
#include "intel_frontbuffer.h"
#include "intel_plane_initial.h"
+void intel_plane_initial_vblank_wait(plane);(struct intel_plane *plane)
+{
+ struct intel_crtc *crtc = intel_crtc_for_pipe(to_intel_display(plane), plane->pipe);
+
+ intel_crtc_wait_for_next_vblank(crtc);
+}
+
static bool
intel_reuse_initial_plane_obj(struct intel_crtc *this,
const struct intel_initial_plane_config plane_configs[],
@@ -438,7 +445,7 @@ void intel_initial_plane_config(struct drm_i915_private *i915)
intel_find_initial_plane_obj(crtc, plane_configs);
if (i915->display.funcs.display->fixup_initial_plane_config(crtc, plane_config))
- intel_crtc_wait_for_next_vblank(crtc);
+ intel_initial_vblank_wait(crtc);
plane_config_fini(plane_config);
}
@@ -8,6 +8,7 @@
struct drm_i915_private;
+void intel_plane_initial_vblank_wait(struct intel_plane *plane);
void intel_initial_plane_config(struct drm_i915_private *i915);
#endif
@@ -8,7 +8,9 @@
#include "regs/xe_gtt_defs.h"
#include "xe_ggtt.h"
+#include "xe_mmio.h"
+#include "i915_reg.h"
#include "intel_atomic_plane.h"
#include "intel_crtc.h"
#include "intel_display.h"
@@ -22,6 +24,21 @@
#include <generated/xe_wa_oob.h>
+void intel_plane_initial_vblank_wait(struct intel_plane *plane)
+{
+ /* Early xe has no irq */
+ struct xe_device *xe = to_xe_device(plane->base.dev);
+ struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(plane->pipe)));
+ u32 timestamp;
+ int ret;
+
+ timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp);
+
+ ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false);
+ if (ret < 0)
+ drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret);
+}
+
static bool
intel_reuse_initial_plane_obj(struct intel_crtc *this,
const struct intel_initial_plane_config plane_configs[],
@@ -293,7 +310,7 @@ void intel_initial_plane_config(struct drm_i915_private *i915)
intel_find_initial_plane_obj(crtc, plane_configs);
if (i915->display.funcs.display->fixup_initial_plane_config(crtc, plane_config))
- intel_crtc_wait_for_next_vblank(crtc);
+ intel_plane_initial_vblank_wait(to_intel_plane(crtc->base.primary));
plane_config_fini(plane_config);
}