diff mbox series

[RFC,v1,1/4] drm/i915/scaler: Calculate scaler prefill latency

Message ID 20241112085039.1258860-2-mitulkumar.ajitkumar.golani@intel.com (mailing list archive)
State New
Headers show
Series Update VRR guardband for HRR panel | expand

Commit Message

Mitul Golani Nov. 12, 2024, 8:50 a.m. UTC 
Calculate scaler prefill latency which accounts for time for
each scaler in pipeline.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 39 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/skl_scaler.h |  1 +
 2 files changed, 40 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 7dbc99b02eaa..eec4a5f783fa 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -6,6 +6,7 @@ 
 #include "i915_reg.h"
 #include "intel_de.h"
 #include "intel_display_types.h"
+#include "intel_crtc.h"
 #include "intel_fb.h"
 #include "skl_scaler.h"
 #include "skl_universal_plane.h"
@@ -839,3 +840,41 @@  void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
 	else
 		scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
 }
+
+int skl_calc_scaler_prefill_latency(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state);
+	struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
+	int scaler_prefill_latency[2];
+	int num_scaler_in_use, count, hscale, vscale, tot_scaler_prefill_usec;
+	int hscan_time = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.htotal * 1000,
+				      crtc_state->hw.adjusted_mode.crtc_clock);
+
+	for (count = 0; count < crtc->num_scalers; count++)
+		if (scaler_state->scalers[count].in_use)
+			num_scaler_in_use++;
+
+	if (!num_scaler_in_use)
+		return 0;
+
+	if (num_scaler_in_use == 2) {
+		hscale = drm_rect_calc_hscale(&plane_state->uapi.src,
+					      &plane_state->uapi.dst,
+					      0, INT_MAX);
+		vscale = drm_rect_calc_vscale(&plane_state->uapi.src,
+					      &plane_state->uapi.dst,
+					      0, INT_MAX);
+		scaler_prefill_latency[1] = 4 * hscan_time * hscale * vscale;
+	}
+
+	/*
+	 * FIXME : When only 1 scaler used, 1st scaler can be downscale/upscale
+	 */
+	scaler_prefill_latency[0] = 4 * hscan_time;
+	tot_scaler_prefill_usec = scaler_prefill_latency[0] + scaler_prefill_latency[1];
+
+	return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
+					tot_scaler_prefill_usec);
+}
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 63f93ca03c89..cd4d961d3b02 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -34,4 +34,5 @@  void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
 
 void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
 
+int skl_calc_scaler_prefill_latency(struct intel_crtc_state *crtc_state);
 #endif