[12/12] drm/i915/dp: Set the DSC link limits intel_dp_compute_config_link_bpp_limits

Message ID	20241120103802.134295-13-ankit.k.nautiyal@intel.com (mailing list archive)
State	New
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 12/12] drm/i915/dp: Set the DSC link limits intel_dp_compute_config_link_bpp_limits Date: Wed, 20 Nov 2024 16:08:02 +0530 Message-ID: <20241120103802.134295-13-ankit.k.nautiyal@intel.com> In-Reply-To: <20241120103802.134295-1-ankit.k.nautiyal@intel.com> References: <20241120103802.134295-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	DP DSC min/max src bpc fixes \| expand [00/12] DP DSC min/max src bpc fixes [01/12] drm/i915/dp: Refactor FEC support check in intel_dp_supports_dsc [02/12] drm/i915/dp: Return early if DSC not supported [03/12] drm/i915/dp: Separate out helper for compute fec_enable [04/12] drm/i915/dp: Remove HAS_DSC macro for intel_dp_dsc_max_src_input_bpc [05/12] drm/i915/dp: Return int from dsc_max/min_src_input_bpc helpers [06/12] drm/i915/dp_mst: Use helpers to get dsc min/max input bpc [07/12] drm/i915/dp: Drop max_requested_bpc for dsc pipe_min/max bpp [08/12] drm/i915/dp: Refactor pipe_bpp limits with dsc [09/12] drm/i915/dp_mst: Refactor pipe_bpp limits with dsc for mst [10/12] drm/i915/dp: Use clamp for pipe_bpp limits with DSC [11/12] drm/i915/dp: Make dsc helpers accept const crtc_state pointers [12/12] drm/i915/dp: Set the DSC link limits intel_dp_compute_config_link_bpp_limits

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 1adde61c5b76..21cde5487e1a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2161,21 +2161,16 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, { const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; struct drm_i915_private *i915 = dp_to_i915(intel_dp); - int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; - int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + int dsc_min_bpp; + int dsc_max_bpp; int dsc_joiner_max_bpp; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); - dsc_src_min_bpp = dsc_src_min_compressed_bpp(); - dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); - dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); - dsc_min_bpp = max(dsc_min_bpp, fxp_q4_to_int_roundup(limits->link.min_bpp_x16)); + dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); - dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); - dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, - pipe_config, - pipe_bpp / 3); - dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; + dsc_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + pipe_config, + pipe_bpp / 3); dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, adjusted_mode->clock, adjusted_mode->hdisplay, @@ -2286,8 +2281,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct intel_connector *connector = to_intel_connector(conn_state->connector); int pipe_bpp, forced_bpp; - int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; - int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + int dsc_min_bpp; + int dsc_max_bpp; forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits); @@ -2307,16 +2302,12 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, pipe_config->port_clock = limits->max_rate; pipe_config->lane_count = limits->max_lane_count; - dsc_src_min_bpp = dsc_src_min_compressed_bpp(); - dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); - dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); - dsc_min_bpp = max(dsc_min_bpp, fxp_q4_to_int_roundup(limits->link.min_bpp_x16)); + dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); + + dsc_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + pipe_config, + pipe_bpp / 3); - dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); - dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, - pipe_config, - pipe_bpp / 3); - dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; dsc_max_bpp = min(dsc_max_bpp, fxp_q4_to_int(limits->link.max_bpp_x16)); /* Compressed BPP should be less than the Input DSC bpp */ @@ -2455,6 +2446,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, /** * intel_dp_compute_config_link_bpp_limits - compute output link bpp limits * @intel_dp: intel DP + * @connector: intel connector * @crtc_state: crtc state * @dsc: DSC compression mode * @limits: link configuration limits @@ -2466,6 +2458,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, */ bool intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state, bool dsc, struct link_config_limits *limits) @@ -2488,12 +2481,22 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp); } else { - /* - * TODO: set the DSC link limits already here, atm these are - * initialized only later in intel_edp_dsc_compute_pipe_bpp() / - * intel_dp_dsc_compute_pipe_bpp() - */ - limits->link.min_bpp_x16 = 0; + int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; + int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + + dsc_src_min_bpp = dsc_src_min_compressed_bpp(); + dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(crtc_state); + dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); + limits->link.min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp); + + dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); + dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + crtc_state, + limits->pipe.max_bpp / 3); + dsc_max_bpp = dsc_sink_max_bpp ? + min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; + + max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp)); } limits->link.max_bpp_x16 = max_link_bpp_x16; @@ -2566,6 +2569,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, intel_dp_test_compute_config(intel_dp, crtc_state, limits); return intel_dp_compute_config_link_bpp_limits(intel_dp, + intel_dp->attached_connector, crtc_state, dsc, limits); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index eac517c1d445..5981ab36fa8d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -197,6 +197,7 @@ int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); bool intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state, bool dsc, struct link_config_limits *limits); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 78cb65f7cb2b..356c328aba72 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -576,6 +576,7 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp, intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits); if (!intel_dp_compute_config_link_bpp_limits(intel_dp, + connector, crtc_state, dsc, limits))

[12/12] drm/i915/dp: Set the DSC link limits intel_dp_compute_config_link_bpp_limits

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