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[1/2] drm/i915/guc/slpc: Enable GuC SLPC default strategies

Message ID 20241216204404.1621540-2-rodrigo.vivi@intel.com (mailing list archive)
State New
Headers show
Series Enable GuC SLPC default balancing strategies | expand

Commit Message

Rodrigo Vivi Dec. 16, 2024, 8:44 p.m. UTC
The Balancer and DCC strategies were left off on a fear that
these strategies would conflict with the i915's waitboost.
However, these strategies are only active in certain conditions where
the system is TDP limited. So, they don't conflict, but help the
waitboost by guaranteeing a bit more of GT frequency.

Without these strategies we were likely leaving some performance
behind on some scenarious.

Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 -----------------
 1 file changed, 17 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index 706fffca698b..722da8a7f852 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -76,17 +76,6 @@  static void slpc_mem_set_enabled(struct slpc_shared_data *data,
 	slpc_mem_set_param(data, disable_id, 0);
 }
 
-static void slpc_mem_set_disabled(struct slpc_shared_data *data,
-				  u8 enable_id, u8 disable_id)
-{
-	/*
-	 * Disabling a param involves setting the enable_id
-	 * to 0 and disable_id to 1.
-	 */
-	slpc_mem_set_param(data, disable_id, 1);
-	slpc_mem_set_param(data, enable_id, 0);
-}
-
 static u32 slpc_get_state(struct intel_guc_slpc *slpc)
 {
 	struct slpc_shared_data *data;
@@ -366,12 +355,6 @@  static void slpc_shared_data_reset(struct slpc_shared_data *data)
 	/* Enable only GTPERF task, disable others */
 	slpc_mem_set_enabled(data, SLPC_PARAM_TASK_ENABLE_GTPERF,
 			     SLPC_PARAM_TASK_DISABLE_GTPERF);
-
-	slpc_mem_set_disabled(data, SLPC_PARAM_TASK_ENABLE_BALANCER,
-			      SLPC_PARAM_TASK_DISABLE_BALANCER);
-
-	slpc_mem_set_disabled(data, SLPC_PARAM_TASK_ENABLE_DCC,
-			      SLPC_PARAM_TASK_DISABLE_DCC);
 }
 
 /**