diff mbox series

[v3] drm/i915/display: Don't update DBUF_TRACKER_STATE_SERVICE

Message ID 20250108200210.1815229-1-ravi.kumar.vodapalli@intel.com (mailing list archive)
State New
Headers show
Series [v3] drm/i915/display: Don't update DBUF_TRACKER_STATE_SERVICE | expand

Commit Message

Ravi Kumar Vodapalli Jan. 8, 2025, 8:02 p.m. UTC
The bspec only asks the driver to reprogram the DBUF_CTL's
DBUF_TRACKER_STATE_SERVICE field to 0x8 on DG2 and platforms with
display version 12. All other platforms should avoid reprogramming
this register at driver init.

Although we've been accidentally reprogramming DBUF_CTL on platforms
where the spec does not ask us to, that mistake has been harmless so
far because the value being programmed by the driver happened to
match the hardware's default settings.

So, update DBUF_TRACKER_STATE_SERVICE field to 0x8 only for
1. display version 12
2. DG2.
Other platforms unless stated should use their default value.

Bspec: 49213
Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

Comments

Matt Roper Jan. 8, 2025, 8:29 p.m. UTC | #1
On Thu, Jan 09, 2025 at 01:32:10AM +0530, Ravi Kumar Vodapalli wrote:
> The bspec only asks the driver to reprogram the DBUF_CTL's
> DBUF_TRACKER_STATE_SERVICE field to 0x8 on DG2 and platforms with
> display version 12. All other platforms should avoid reprogramming
> this register at driver init.
> 
> Although we've been accidentally reprogramming DBUF_CTL on platforms
> where the spec does not ask us to, that mistake has been harmless so
> far because the value being programmed by the driver happened to
> match the hardware's default settings.
> 
> So, update DBUF_TRACKER_STATE_SERVICE field to 0x8 only for
> 1. display version 12
> 2. DG2.
> Other platforms unless stated should use their default value.
> 
> Bspec: 49213
> Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>

I just noticed that the patch subject isn't quite right (it implies that
we aren't updating that field on _any_ platforms), but I can tweak that
while applying the patch; no need to re-send.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

And since the CI results on the previous version were clean (aside from
one false positive on a DG1 GEM test) and the only changes in this
version are to the commit message, applied to drm-intel-next.  Thanks
for the patch.


Matt

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 34465d56def0..9c20459053fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1126,9 +1126,6 @@ static void gen12_dbuf_slices_config(struct intel_display *display)
>  {
>  	enum dbuf_slice slice;
>  
> -	if (display->platform.alderlake_p)
> -		return;
> -
>  	for_each_dbuf_slice(display, slice)
>  		intel_de_rmw(display, DBUF_CTL_S(slice),
>  			     DBUF_TRACKER_STATE_SERVICE_MASK,
> @@ -1681,7 +1678,7 @@ static void icl_display_core_init(struct intel_display *display,
>  	/* 4. Enable CDCLK. */
>  	intel_cdclk_init_hw(display);
>  
> -	if (DISPLAY_VER(display) >= 12)
> +	if (DISPLAY_VER(display) == 12 || display->platform.dg2)
>  		gen12_dbuf_slices_config(display);
>  
>  	/* 5. Enable DBUF. */
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 34465d56def0..9c20459053fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1126,9 +1126,6 @@  static void gen12_dbuf_slices_config(struct intel_display *display)
 {
 	enum dbuf_slice slice;
 
-	if (display->platform.alderlake_p)
-		return;
-
 	for_each_dbuf_slice(display, slice)
 		intel_de_rmw(display, DBUF_CTL_S(slice),
 			     DBUF_TRACKER_STATE_SERVICE_MASK,
@@ -1681,7 +1678,7 @@  static void icl_display_core_init(struct intel_display *display,
 	/* 4. Enable CDCLK. */
 	intel_cdclk_init_hw(display);
 
-	if (DISPLAY_VER(display) >= 12)
+	if (DISPLAY_VER(display) == 12 || display->platform.dg2)
 		gen12_dbuf_slices_config(display);
 
 	/* 5. Enable DBUF. */