Message ID | 20250110044131.3162682-3-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add helper for range_bpg_offset and minor fixes | expand |
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index df07090c84eb..1e8f71fb3094 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -124,7 +124,6 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg) vdsc_cfg->slice_height - 1); } - /* Our hw supports only 444 modes as of today */ if (bpp >= 12) vdsc_cfg->initial_offset = 2048; else if (bpp >= 10)