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[3/8] drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updates

Message ID 20250116201637.22486-4-ville.syrjala@linux.intel.com (mailing list archive)
State New
Headers show
Series drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling | expand

Commit Message

Ville Syrjala Jan. 16, 2025, 8:16 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Update TRANS_SET_CONTEXT_LATENCY in intel_set_transcoder_timings_lrr()
as well. While for actual LRR updates this should not change, I want
to reuse this code to also sanitize the vblank delay during boot,
and in that case we do need to update this.

Cc: Paz Zcharya <pazz@chromium.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1260e394afc7..ac6fc177099f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2930,6 +2930,10 @@  static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
 	}
 
 	if (DISPLAY_VER(dev_priv) >= 13) {
+		intel_de_write(dev_priv,
+			       TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder),
+			       crtc_vblank_start - crtc_vdisplay);
+
 		/*
 		 * VBLANK_START not used by hw, just clear it
 		 * to make it stand out in register dumps.