From patchwork Tue Jan 21 17:58:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13946467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38770C02182 for ; Tue, 21 Jan 2025 18:02:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D569710E215; Tue, 21 Jan 2025 18:02:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BBPwBXiY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEA0210E215 for ; Tue, 21 Jan 2025 18:02:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737482525; x=1769018525; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=FQWjJ4NxwuHBpmW1Ww4vBBWfhpLZxY4S0+ddnJ2XtoY=; b=BBPwBXiYUcj+8WlSw25CiQR4mz7UqCCHJ+qNPK1gzeuXeVDLZPuVxljq bBTKqvu/MNcjDDnbOektV4Vhfyv2O5U/3PGL5mhPHzccfO8GNHZ6wSuic 7UmxnkrATwIQAccrz1pIgbWVzhilrRiSp/BTJ82+xGbCSUA5J5ddcbruK QXTT6Ay5hwc/3kWGapPjI9zUzVxBBwgHucV6BjawbajfMtG6Hoby8Z1a6 AWD6UjfezS+OUeSMnfYi3ZHjbiFBmyohNPMwx35UuOwEZSY39CTkw0ixG Qpj6pOGIVcRmGh6J1FbGmLQygy0lFxZLLbZGHBEjX3AC8SUrY1n9gxlns A==; X-CSE-ConnectionGUID: DFb79X5wTcWd+yZOFAQXvA== X-CSE-MsgGUID: o0YrR4HgQe6LL96xoDJhMA== X-IronPort-AV: E=McAfee;i="6700,10204,11322"; a="49305508" X-IronPort-AV: E=Sophos;i="6.13,222,1732608000"; d="scan'208";a="49305508" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2025 10:02:05 -0800 X-CSE-ConnectionGUID: k5xRVpCvSZ6SxpXySPf53w== X-CSE-MsgGUID: gm/bhSr3QWuBKrkEhUBkIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="137747463" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa001.fm.intel.com with ESMTP; 21 Jan 2025 10:02:04 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Subject: [PATCH v10 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler Date: Tue, 21 Jan 2025 23:28:56 +0530 Message-ID: <20250121175856.447245-1-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120172209.188488-5-mitulkumar.ajitkumar.golani@intel.com> References: <20250120172209.188488-5-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Compute scaling factors and scaler user for pipe scaler if particular scaler user is pipe scaler. --v2: - Fix typos. [Ankit] - Remove FIXME tag. [Ankit] - Should be common hscale, vscale instead of local one to avoid garbage overwritten. --v3: - Separate out max_scaling information. [Ankit] - Use max_hscale and max_vscale info instead of INT_MAX. [Ankit] --v4: - Add Suggested changes reported by Dan Carpenter. Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal Reported-by: kernel test robot Reported-by: Dan Carpenter Closes: https://lore.kernel.org/r/202501080440.Cxe0ZHXJ-lkp@intel.com/ --- drivers/gpu/drm/i915/display/skl_scaler.c | 39 +++++++++++++++++++---- 1 file changed, 32 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index a832cdccd9fa..2e157d8afb75 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -368,6 +368,8 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, &crtc_state->scaler_state; struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 mode; + int hscale = 0; + int vscale = 0; if (*scaler_id < 0) *scaler_id = intel_allocate_scaler(scaler_state, crtc); @@ -416,15 +418,11 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, mode = SKL_PS_SCALER_MODE_DYN; } - /* - * FIXME: we should also check the scaler factors for pfit, so - * this shouldn't be tied directly to planes. - */ if (plane_state && plane_state->hw.fb) { const struct drm_framebuffer *fb = plane_state->hw.fb; const struct drm_rect *src = &plane_state->uapi.src; const struct drm_rect *dst = &plane_state->uapi.dst; - int hscale, vscale, max_vscale, max_hscale; + int max_hscale, max_vscale; calculate_max_scale(crtc, intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier), @@ -448,11 +446,38 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, return -EINVAL; } + } + + if (crtc_state->pch_pfit.enabled) { + struct drm_rect src; + int max_hscale, max_vscale; + + drm_rect_init(&src, 0, 0, + drm_rect_width(&crtc_state->pipe_src) << 16, + drm_rect_height(&crtc_state->pipe_src) << 16); + + calculate_max_scale(crtc, 0, *scaler_id, + &max_hscale, &max_vscale); - scaler_state->scalers[*scaler_id].hscale = hscale; - scaler_state->scalers[*scaler_id].vscale = vscale; + hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst, + 0, max_hscale); + vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst, + 0, max_vscale); + + if (hscale < 0 || vscale < 0) { + drm_dbg_kms(display->drm, + "Scaler %d doesn't support required pipe scaling\n", + *scaler_id); + drm_rect_debug_print("src: ", &src, true); + drm_rect_debug_print("dst: ", &crtc_state->pch_pfit.dst, false); + + return -EINVAL; + } } + scaler_state->scalers[*scaler_id].hscale = hscale; + scaler_state->scalers[*scaler_id].vscale = vscale; + drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n", crtc->base.base.id, crtc->base.name, crtc->pipe, *scaler_id, name, idx);