Message ID | 20250124150020.2271747-28-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show
Return-Path: <intel-gfx-bounces@lists.freedesktop.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 459EBC0218C for <intel-gfx@archiver.kernel.org>; Fri, 24 Jan 2025 15:12:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC2AF10E9B3; Fri, 24 Jan 2025 15:12:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hvboYCmM"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7DB3D10E9B0; Fri, 24 Jan 2025 15:12:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737731559; x=1769267559; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wguPT8YZnV+hNebZBpfB95Y+ayYusXb1YueeMusyTRY=; b=hvboYCmMlBdfDfsT+YUCzbJUy6uIHqUMujVoyOSpBlTp70VWj5HxJ40j GESbfVBXydZZDHyFuZINvIp9kHJTQk7auyo6X/HZAHq2wUgnUAIl7nG6Y 5v3f0E2tgXkU5spFVAbdWMEBB3+Jxtb9lrrzH/II1GPzKL6+7XgO14KAN h6GVuyOZY0CIEHqHwF3glNgiEaa3RSIEfEjfcPqn9wVOtVf/fZktLliXK QaTcZf+vIjvexpnyp48o8a3R1EBvY8w6TTvlOCpH0PnuodC78z8malcjm PN/9MSFAeYGPKoULOsU5q6Gjrv3rgN24fEPMBZqK+BhEAtLOfkQ/X17hJ Q==; X-CSE-ConnectionGUID: 58D32ZtYSXSiik3iAtsH8Q== X-CSE-MsgGUID: Wp0xx3n2T56N7QXbWmr/Hg== X-IronPort-AV: E=McAfee;i="6700,10204,11325"; a="38177467" X-IronPort-AV: E=Sophos;i="6.13,231,1732608000"; d="scan'208";a="38177467" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2025 07:12:38 -0800 X-CSE-ConnectionGUID: cq36CCJaTUGwz7UWSKsRBw== X-CSE-MsgGUID: pbM0+d/xQz2Ut7YIo6t9Ow== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="108221591" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2025 07:12:36 -0800 From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 27/35] drm/i915/display: Disable PSR before disabling VRR Date: Fri, 24 Jan 2025 20:30:12 +0530 Message-ID: <20250124150020.2271747-28-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250124150020.2271747-1-ankit.k.nautiyal@intel.com> References: <20250124150020.2271747-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development <intel-gfx.lists.freedesktop.org> List-Unsubscribe: <https://lists.freedesktop.org/mailman/options/intel-gfx>, <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe> List-Archive: <https://lists.freedesktop.org/archives/intel-gfx> List-Post: <mailto:intel-gfx@lists.freedesktop.org> List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help> List-Subscribe: <https://lists.freedesktop.org/mailman/listinfo/intel-gfx>, <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe> Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org> |
Series |
Use VRR timing generator for fixed refresh rate modes
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expand
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diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6ae634ea23c5..1d8383e1d783 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1307,6 +1307,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1317,8 +1319,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc);
As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)