@@ -222,6 +222,23 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
return vtotal;
}
+static
+void intel_vrr_prepare_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ crtc_state->vrr.vmin = vmin;
+ crtc_state->vrr.vmax = vmax;
+ crtc_state->vrr.flipline = crtc_state->vrr.vmin;
+
+ /*
+ * flipline determines the min vblank length the hardware will
+ * generate, and on ICL/TGL flipline>=vmin+1, hence we reduce
+ * vmin by one to make sure we can get the actual min vblank length.
+ */
+ crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
+}
+
void
intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
@@ -264,17 +281,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (vmin >= vmax)
return;
- crtc_state->vrr.vmin = vmin;
- crtc_state->vrr.vmax = vmax;
-
- crtc_state->vrr.flipline = crtc_state->vrr.vmin;
-
- /*
- * flipline determines the min vblank length the hardware will
- * generate, and on ICL/TGL flipline>=vmin+1, hence we reduce
- * vmin by one to make sure we can get the actual min vblank length.
- */
- crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
+ intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax);
if (crtc_state->uapi.vrr_enabled) {
crtc_state->vrr.enable = true;
Move the VRR timing setup code from intel_vrr_compute_config() to a new function intel_vrr_prepare_vrr_timings(). Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_vrr.c | 29 +++++++++++++++--------- 1 file changed, 18 insertions(+), 11 deletions(-)