| Message ID | 20250130210027.591927-8-vinod.govindapillai@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/xe3: FBC Dirty rect feature support | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Vinod > Govindapillai > Sent: Friday, January 31, 2025 2:30 AM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Govindapillai, Vinod <vinod.govindapillai@intel.com>; Syrjala, Ville > <ville.syrjala@intel.com>; Reddy Guddati, Santhosh > <santhosh.reddy.guddati@intel.com>; Saarinen, Jani > <jani.saarinen@intel.com> > Subject: [PATCH v6 7/7] drm/i915/xe3: disable FBC if PSR2 selective fetch is > enabled > > It is not recommended to have both FBC dirty rect and PSR2 selective fetch be > enabled at the same time. If PSR2 selective fetch or panel replay is on, mark > FBC as not possible. > > v2: fix the condition to disable FBC if PSR2 enabled (Jani) > > v3: use HAS_FBC_DIRTY_RECT() > > Bspec: 68881 > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> LGTM, Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c > b/drivers/gpu/drm/i915/display/intel_fbc.c > index b17ee1797118..429e213e1dcd 100644 > --- a/drivers/gpu/drm/i915/display/intel_fbc.c > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c > @@ -1481,9 +1481,14 @@ static int intel_fbc_check_plane(struct > intel_atomic_state *state, > * Display 12+ is not supporting FBC with PSR2. > * Recommendation is to keep this combination disabled > * Bspec: 50422 HSD: 14010260002 > + * > + * In Xe3, PSR2 selective fetch and FBC dirty rect feature cannot > + * coexist. So if PSR2 selective fetch is supported then mark that > + * FBC is not supported. > + * TODO: Need a logic to decide between PSR2 and FBC Dirty rect > */ > - if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update && > - !crtc_state->has_panel_replay) { > + if ((IS_DISPLAY_VER(display, 12, 14) || HAS_FBC_DIRTY_RECT(display)) > && > + crtc_state->has_sel_update && !crtc_state->has_panel_replay) { > plane_state->no_fbc_reason = "PSR2 enabled"; > return 0; > } > -- > 2.43.0
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index b17ee1797118..429e213e1dcd 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1481,9 +1481,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, * Display 12+ is not supporting FBC with PSR2. * Recommendation is to keep this combination disabled * Bspec: 50422 HSD: 14010260002 + * + * In Xe3, PSR2 selective fetch and FBC dirty rect feature cannot + * coexist. So if PSR2 selective fetch is supported then mark that + * FBC is not supported. + * TODO: Need a logic to decide between PSR2 and FBC Dirty rect */ - if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update && - !crtc_state->has_panel_replay) { + if ((IS_DISPLAY_VER(display, 12, 14) || HAS_FBC_DIRTY_RECT(display)) && + crtc_state->has_sel_update && !crtc_state->has_panel_replay) { plane_state->no_fbc_reason = "PSR2 enabled"; return 0; }
It is not recommended to have both FBC dirty rect and PSR2 selective fetch be enabled at the same time. If PSR2 selective fetch or panel replay is on, mark FBC as not possible. v2: fix the condition to disable FBC if PSR2 enabled (Jani) v3: use HAS_FBC_DIRTY_RECT() Bspec: 68881 Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> --- drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)