| Message ID | 20250212075742.995022-10-jouni.hogander@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | PSR DSB support | expand |
On Wed, Feb 12, 2025 at 09:57:37AM +0200, Jouni Högander wrote: > Add drm_WARN_ON(use_dsb) into commit_pipe_{pre,post}_planes() and > intel_pipe_update_{start,end}() as they are not supposed to get called on > non-dsb updates. > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++++ > drivers/gpu/drm/i915/display/intel_display.c | 6 +++++- > 2 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c > index 89785da93603..eb089d76ba2a 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -522,6 +522,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state, > struct intel_vblank_evade_ctx evade; > int scanline; > > + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); > + > intel_psr_lock(new_crtc_state); > > if (new_crtc_state->do_async_flip) { > @@ -660,6 +662,8 @@ void intel_pipe_update_end(struct intel_atomic_state *state, > ktime_t end_vbl_time = ktime_get(); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); > + > if (new_crtc_state->do_async_flip) > goto out; > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index cab6852dd9c2..79b8d2ad3b9c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -7141,11 +7141,13 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, > intel_atomic_get_new_crtc_state(state, crtc); > bool modeset = intel_crtc_needs_modeset(new_crtc_state); > > + drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); > + > /* > * During modesets pipe configuration was programmed as the > * CRTC was enabled. > */ > - if (!modeset && !new_crtc_state->use_dsb) { > + if (!modeset) { > if (intel_crtc_needs_color_update(new_crtc_state)) > intel_color_commit_arm(NULL, new_crtc_state); > > @@ -7168,6 +7170,8 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state, > const struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > > + drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); > + > /* > * Disable the scaler(s) after the plane(s) so that we don't > * get a catastrophic underrun even if the two operations > -- > 2.43.0
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 89785da93603..eb089d76ba2a 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -522,6 +522,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state, struct intel_vblank_evade_ctx evade; int scanline; + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); + intel_psr_lock(new_crtc_state); if (new_crtc_state->do_async_flip) { @@ -660,6 +662,8 @@ void intel_pipe_update_end(struct intel_atomic_state *state, ktime_t end_vbl_time = ktime_get(); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + drm_WARN_ON(display->drm, new_crtc_state->use_dsb); + if (new_crtc_state->do_async_flip) goto out; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index cab6852dd9c2..79b8d2ad3b9c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7141,11 +7141,13 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); bool modeset = intel_crtc_needs_modeset(new_crtc_state); + drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); + /* * During modesets pipe configuration was programmed as the * CRTC was enabled. */ - if (!modeset && !new_crtc_state->use_dsb) { + if (!modeset) { if (intel_crtc_needs_color_update(new_crtc_state)) intel_color_commit_arm(NULL, new_crtc_state); @@ -7168,6 +7170,8 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state, const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb); + /* * Disable the scaler(s) after the plane(s) so that we don't * get a catastrophic underrun even if the two operations
Add drm_WARN_ON(use_dsb) into commit_pipe_{pre,post}_planes() and intel_pipe_update_{start,end}() as they are not supposed to get called on non-dsb updates. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++++ drivers/gpu/drm/i915/display/intel_display.c | 6 +++++- 2 files changed, 9 insertions(+), 1 deletion(-)