From patchwork Wed Feb 12 17:43:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Sousa X-Patchwork-Id: 13972243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4789C021A5 for ; Wed, 12 Feb 2025 17:43:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 45FCB10E948; Wed, 12 Feb 2025 17:43:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="fkMc9OnQ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 03E0910E947; Wed, 12 Feb 2025 17:43:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739382228; x=1770918228; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NrrsJBGGj+6RiKlZLWEgbb895tj94AD1tSlsq7h/1LM=; b=fkMc9OnQNdRY5rVhKj3bfb6Fl9+y17AlKaIIWEWtDSJXxFD7OzB/T4d+ kPKjE2PWnKX2tyPKjh+M9+kVxSY0IBmrKPoHDFLqBMaVw02MCOusauTTN uNj5HB0GxaJvDy44EwYg29QZBQjy6pHPbAowitmWhZMtDKrxC6hTBfAi8 1UtkoBthvh/pDleKY34/oyKBAZ5kf8sX5dCjBUBcPFDdEznV+CaBU9ZN0 Iru6JrQfPh5oWM6yNLPrJJQDIID6xddX6Mo6o4+Wgcxn/dl8T9laGFxY2 XbFPKbdyg7BkdhAWweMLGTG/cKiPQ3qRmbjEXGboX9k7rqwwWp01EaSWa A==; X-CSE-ConnectionGUID: ywP/0fPlTHikO8KNzh4qqQ== X-CSE-MsgGUID: IVdexD+TS9CkKCHDH5iScQ== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="40180089" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="40180089" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 09:43:48 -0800 X-CSE-ConnectionGUID: wAE64eh4Q1+pmahu2C57YA== X-CSE-MsgGUID: bljx5X13RQmtjA4PuRHyLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="150069142" Received: from dnelso2-mobl.amr.corp.intel.com (HELO gjsousa-mobl2.corp.amr.intel.com) ([10.125.108.97]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 09:43:47 -0800 From: Gustavo Sousa To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula Subject: [PATCH v2 2/2] drm/i915/display: Make POWER_DOMAIN_*() always result in enum intel_display_power_domain Date: Wed, 12 Feb 2025 14:43:17 -0300 Message-ID: <20250212174333.371681-3-gustavo.sousa@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250212174333.371681-1-gustavo.sousa@intel.com> References: <20250212174333.371681-1-gustavo.sousa@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In the hope of contributing to type safety in our code, let's ensure that the type returned by the POWER_DOMAIN_*() macros is always of type enum intel_display_power_domain. v2: - Remove accidental +1 in definition of POWER_DOMAIN_PIPE(). (Jani) Cc: Jani Nikula Signed-off-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_display_power.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index 3caa3f517a32..e354051e8982 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -117,12 +117,13 @@ enum intel_display_power_domain { POWER_DOMAIN_INVALID = POWER_DOMAIN_NUM, }; -#define POWER_DOMAIN_PIPE(pipe) ((int)(pipe) + POWER_DOMAIN_PIPE_A) +#define POWER_DOMAIN_PIPE(pipe) \ + ((enum intel_display_power_domain)((int)(pipe) + POWER_DOMAIN_PIPE_A)) #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \ - ((int)(pipe) + POWER_DOMAIN_PIPE_PANEL_FITTER_A) + ((enum intel_display_power_domain)((int)(pipe) + POWER_DOMAIN_PIPE_PANEL_FITTER_A)) #define POWER_DOMAIN_TRANSCODER(tran) \ ((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \ - (int)(tran) + POWER_DOMAIN_TRANSCODER_A) + (enum intel_display_power_domain)((int)(tran) + POWER_DOMAIN_TRANSCODER_A)) struct intel_power_domain_mask { DECLARE_BITMAP(bits, POWER_DOMAIN_NUM);